mirror of
https://github.com/A2osX/A2osX.git
synced 2024-10-31 23:09:33 +00:00
314 lines
4.9 KiB
Plaintext
314 lines
4.9 KiB
Plaintext
NEW
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AUTO 3,1
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*--------------------------------------
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M16.AND lda #$32 AND (zp)
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.HS 2C BIT ABS
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M16.OR lda #$12 ORA (zp)
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.HS 2C BIT ABS
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M16.XOR lda #$52 EOR (zp)
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.HS 2C BIT ABS
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M16.ADD lda #$72 ADC (zp)
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.HS 2C BIT ABS
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M16.SUB lda #$F2 SBC (zp)
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sta .3
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asl CS if SBC, CC if ADC
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ldy #2
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ldx #2
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.2 lda (pStack),y
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.3 adc (pStack) SELF MODIFIED
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sta (pStack),y
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inc pStack
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dex
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bne .2
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rts
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*--------------------------------------
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M16.SHL sec
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.HS 90 BCC
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M16.SHR clc
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lda (pStack)
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inc pStack
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inc pStack
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tax
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beq .8
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ldy #1
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bcc .3
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.1 lda (pStack)
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asl
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sta (pStack)
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lda (pStack),y
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rol
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sta (pStack),y
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dex
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bne .1
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.8 rts
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*--------------------------------------
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.3 lda (pStack),y
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lsr
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sta (pStack),y
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lda (pStack)
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ror
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sta (pStack)
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dex
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bne .3
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rts
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*--------------------------------------
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M16.L ldx #0
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.HS 2C BIT ABS
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M16.LE ldx #1
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.HS 2C BIT ABS
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M16.G ldx #2
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.HS 2C BIT ABS
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M16.GE ldx #3
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.HS 2C BIT ABS
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M16.E ldx #4
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.HS 2C BIT ABS
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M16.NE ldx #5
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*--------------------------------------
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M16.CMP lda MATH.CMPT,x
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sta .3+1
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jsr M16.SUB
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tay A = BYTE 1
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bmi .1
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ora (pStack) BYTE 0
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beq .2
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lda #%001
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.HS 2C BIT ABS
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.1 lda #%100
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.HS 2C BIT ABS
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.2 lda #%010
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.3 and #$ff SELF MODIFIED
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bra M16.LOR2
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*--------------------------------------
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M16.LAND jsr M16.AND
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bra M16.LOR1
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M16.LOR jsr M16.OR
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M16.LOR1 ldy #1
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lda (pStack)
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ora (pStack),y
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M16.LOR2 beq .1
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lda #1
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.1 sta (pStack)
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lda #0
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ldy #1
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sta (pStack),y
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rts
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*--------------------------------------
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M16.UMUL clc
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.HS B0 BCS
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M16.IMUL sec
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php
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jsr M16.MULDIVMOD
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jsr M16.MUL
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plp
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bcc M16.PutTMP
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M16.ITMP lda ACC32.Sign
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eor ARG32.Sign
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bpl M16.PutTMP
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*--------------------------------------
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* M16.PutnTMP
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*--------------------------------------
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lda #TMP32
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.HS 2C BIT ABS
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*--------------------------------------
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M16.PutnARG lda #ARG32
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sta .1+1
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ldy #0
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ldx #3
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sec
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.1 lda $ff,y SELF MODIFIED
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eor #$ff two's complement of X bytes
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adc #0
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sta (pStack),y
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iny
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dex
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bpl .1
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rts
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*--------------------------------------
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M16.uDIV clc
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.HS B0 BCS
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M16.IDIV sec
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clv
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bra M16.MOD
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M16.UMOD clc
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.HS B0 BCS
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M16.IMOD sec
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bit M16.RTS $60
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M16.MOD php
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jsr M16.MULDIVMOD
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jsr M16.DIVMOD
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plp
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bcc .3 unsigned
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bvs M16.ITMP return ITMP
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lda ACC32.Sign IDIV
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eor ARG32.Sign
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bpl M16.PutARG
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bra M16.PutnARG
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.3 bvc M16.PutARG DIV
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*--------------------------------------
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M16.PutTMP ldy #TMP32 MOD
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.HS 2C BIT ABS
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*--------------------------------------
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M16.PutARG ldy #ARG32
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lda $0,y
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sta (pStack)
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lda $1,y
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ldy #1
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sta (pStack),y
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M16.RTS rts
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*--------------------------------------
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M16.MULDIVMOD >PULLW ACC32
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sta ACC32.Sign
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lda (pStack)
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sta ARG32
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ldy #1
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lda (pStack),y
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sta ARG32+1
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sta ARG32.Sign
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bcc M16.RTS
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jsr .1
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*--------------------------------------
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* M16.ARG32ABS
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*--------------------------------------
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lda ARG32.Sign
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bmi .2
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rts
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*--------------------------------------
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* M16.ACC32ABS
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*--------------------------------------
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.1 lda ACC32.Sign
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bpl M16.RTS
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*--------------------------------------
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* M16.nACC
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*--------------------------------------
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ldy #ACC32
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.HS 2C BIT ABS
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*--------------------------------------
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* M16.nARG32
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*--------------------------------------
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.2 ldy #ARG32
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sec
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lda $0,y
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eor #$ff
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adc #0
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sta $0,y
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lda $1,y
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eor #$ff
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adc #0
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sta $1,y
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rts
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*--------------------------------------
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M16.MUL stz TMP32
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stz TMP32+1
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ldx #16
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.1 lsr ARG32+1
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ror ARG32
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bcc .3
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clc
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.2 lda TMP32
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adc ACC32
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sta TMP32
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lda TMP32+1
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adc ACC32+1
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sta TMP32+1
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.3 asl ACC32
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rol ACC32+1
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dex
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bne .1
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rts
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*--------------------------------------
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M16.DIVMOD stz TMP32
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stz TMP32+1
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ldx #16
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.1 asl ARG32
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rol ARG32+1
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rol TMP32
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rol TMP32+1
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sec
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lda TMP32
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sbc ACC32
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tay
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lda TMP32+1
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sbc ACC32+1
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bcc .2
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sty TMP32
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sta TMP32+1
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inc ARG32 bit0 always 0 because of .1 asl
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.2 dex
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bne .1
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rts
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*--------------------------------------
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MAN
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SAVE usr/src/sys/kernel.s.math16
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LOAD usr/src/sys/kernel.s
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ASM
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