mirror of
https://github.com/markdavidlong/AppleSAWS.git
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178 lines
5.7 KiB
C++
178 lines
5.7 KiB
C++
#ifndef DISASSEMBLER_H
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#define DISASSEMBLER_H
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#include "MemoryUsageMap.h"
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#include "util.h"
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#include <QByteArray>
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#include <QStringList>
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#include <QHash>
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#include <QDebug>
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enum AddressMode {
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AM_InvalidOp,
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AM_Absolute, // a
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AM_AbsoluteIndexedIndirect, // (a,x)
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AM_AbsoluteIndexedWithX, // a,x
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AM_AbsoluteIndexedWithY, // a,y
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AM_AbsoluteIndirect, // (a)
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AM_Immediate, // #
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AM_Implied, // i
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AM_Accumulator, // A
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AM_ProgramCounterRelative, // r
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AM_ZeroPage, // zp
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AM_ZeroPageIndexedIndirect, // (zp,x)
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AM_ZeroPageIndexedWithX, // zp,x
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AM_ZeroPageIndexedWithY, // zp,y
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AM_ZeroPageIndirect, // (zp)
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AM_ZeroPageIndirectIndexedWithY // (zp),y
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};
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//////////////////////////////////////////////////////////////////////////////
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struct AssyInstruction {
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public:
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AssyInstruction(quint8 opcode = 0x00, QString mnemonic = "???", AddressMode am = AM_InvalidOp);
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AddressMode addressMode() { return m_addressMode; }
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QString mnemonic() { return m_mnemonic; }
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quint8 opcode() { return m_opcode; }
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quint8 numArgs();
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QString debugStr() { return QString("%1 %2 %3").arg(uint8ToHex(m_opcode)).arg(m_mnemonic).arg(m_addressMode); }
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private:
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QString m_mnemonic;
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quint8 m_opcode;
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AddressMode m_addressMode;
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};
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//////////////////////////////////////////////////////////////////////////////
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class DisassembledItem {
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public:
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DisassembledItem() { init(); }
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DisassembledItem(AssyInstruction instr);
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bool operator<(const DisassembledItem &other) const { return (address() < other.address()); }
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void setInstruction(AssyInstruction instr);
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void setAddress(quint16 add) { m_address = add; }
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void setDisassembledString(QString ds) { m_disassembly_text = ds; }
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void setHexValues(QByteArray hv) { m_hexvalues = hv; }
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void setHexString(QString hs) { m_hexstring = hs; }
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void setBranch(bool branch) { m_is_branch = branch; }
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void setJump(bool jump) { m_is_jump = jump; }
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void setJsr(bool jsr) { m_is_jsr = jsr; }
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void setTargetAddress(quint16 ta) { m_unknown_ta = false; m_target_address = ta; }
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void setRawArgument(quint16 arg) { m_has_arg = true; m_raw_arg = arg; }
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void setCanNotFollow(bool canNotFollow) { m_canNotFollow = canNotFollow; }
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void setIsInvalidOp(bool isInvalid) { m_isInvalidOp = isInvalid; }
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AssyInstruction assyInstruction() const { return m_instruction; }
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QString rawDisassembledString() const { return m_disassembly_text; }
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QString disassembledString();
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quint16 address() const { return m_address; }
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QString hexAddress() const { return QString("%1").arg(m_address,4,16,QChar('0')).toUpper(); }
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QByteArray hexValues() const { return m_hexvalues; }
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QString hexString() const { return m_hexstring; }
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bool isBranch() const { return m_is_branch; }
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bool isJump() const { return m_is_jump; }
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bool isJsr() const { return m_is_jsr; }
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bool isReturn() { return (m_instruction.opcode() == 0x60) || m_instruction.opcode() == 0x40; }
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bool isBreak() { return (m_instruction.opcode() == 0x00); }
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bool isInvalidOp() { return m_isInvalidOp; }
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bool canNotFollow() { return m_canNotFollow; }
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bool stopsProcessing() {
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if (isReturn()) qDebug() << "Is Return";
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if (isInvalidOp()) qDebug() << "Is Invalid Op" << uint8ToHex(m_instruction.opcode());
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if (canNotFollow()) qDebug() << "Can not follow indirect jump";
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if (isBreak()) qDebug() << "Is Break";
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return isBreak() || isInvalidOp() || isReturn() || canNotFollow(); }
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quint16 nextContiguousAddress() { return m_nextContiguousAddress; }
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quint16 nextFlowAddress() { return m_nextFlowAddress; }
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void setNextContiguousAddress(quint16 addr) { m_nextContiguousAddress = addr; }
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void setNextFlowAddress(quint16 addr) { m_nextFlowAddress = addr; }
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quint16 targetAddress() const { return m_target_address; }
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bool hasArg() const { return m_has_arg; }
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quint16 arg16() { return m_raw_arg; }
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quint8 arg8() { return m_raw_arg % 256; }
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QString arg16Str() { return QString("%1").arg(arg16(),4,16,QChar('0')).toUpper(); }
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QString arg8Str() { return QString("%1").arg(arg8(),2,16,QChar('0')).toUpper(); }
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private:
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void init();
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quint16 m_address;
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quint16 m_nextContiguousAddress;
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quint16 m_nextFlowAddress;
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quint16 m_target_address;
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QByteArray m_hexvalues;
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QString m_disassembly_text;
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QString m_hexstring;
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bool m_is_branch;
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bool m_is_jump;
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bool m_is_jsr;
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AssyInstruction m_instruction;
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bool m_unknown_ta;
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quint16 m_raw_arg;
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bool m_has_arg;
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bool m_isInvalidOp;
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bool m_canNotFollow;
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};
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//////////////////////////////////////////////////////////////////////////////
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class Disassembler
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{
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public:
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Disassembler(QByteArray memimage);
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enum ProcessorType {
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P6502,
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P65C02
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};
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QList<DisassembledItem> disassemble(quint16 from,
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quint16 to,
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QList<quint16> entryPoints,
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bool processRecursively = true);
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MemoryUsageMap *memoryUsageMap() { return &m_memusagemap; }
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void setUnknownToData(quint16 from, quint16 to);
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QString getMnemonicForOp(quint8 opcode)
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{
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return m_opcodeinfo[opcode].mnemonic();
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}
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private:
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bool disassembleOp(quint16 address, DisassembledItem &retval, MemoryUsageMap *memuse = Q_NULLPTR);
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void makeOpcodeTable();
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QHash<quint8,AssyInstruction> m_opcodeinfo;
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QByteArray m_memimage;
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QList<quint16> m_jumps;
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MemoryUsageMap m_memusagemap;
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};
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#endif // DISASSEMBLER_H
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