2021-08-08 02:48:24 +00:00
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***********************************************************
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* BBC Micro 'virtual machine' in Apple //e aux memory
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***********************************************************
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ZP1 EQU $90 ; $90-$9f are Econet space
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; so safe to use
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ZP2 EQU $92
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ZP3 EQU $94
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2021-08-15 02:34:02 +00:00
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* COL,ROW needs to be in X,Y order
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* TO DO: will be moved to VDU space
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COL EQU $96 ; Cursor column
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ROW EQU $97 ; Cursor row
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2021-08-08 02:48:24 +00:00
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STRTBCKL EQU $9D
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STRTBCKH EQU $9E
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MOSSHIM
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ORG AUXMOS ; MOS shim implementation
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*
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* Shim code to service Acorn MOS entry points using
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* Apple II monitor routines
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* This code is initially loaded into aux mem at AUXMOS1
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* Then relocated into aux LC at AUXMOS by MOSINIT
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*
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* Initially executing at $3000 until copied to $D000
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2021-08-12 21:14:03 +00:00
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MOSINIT LDX #$FF ; Initialize Alt SP to $1FF
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TXS
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STA $C005 ; Make sure we are writing aux
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2021-08-08 02:48:24 +00:00
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STA $C000 ; Make sure 80STORE is off
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LDA $C08B ; LC RAM Rd/Wt, 1st 4K bank
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LDA $C08B
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2021-08-14 06:16:58 +00:00
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:MODBRA BRA :RELOC ; NOPped out on first run
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BRA :NORELOC
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2021-08-08 02:48:24 +00:00
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2021-08-14 06:16:58 +00:00
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LDA #$EA ; NOP opcode
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STA :MODBRA
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STA :MODBRA+1
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:RELOC LDA #<AUXMOS1 ; Relocate MOS shim
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2021-08-08 02:48:24 +00:00
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STA A1L
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LDA #>AUXMOS1
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STA A1H
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LDA #<EAUXMOS1
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STA A2L
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LDA #>EAUXMOS1
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STA A2H
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LDA #<AUXMOS
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STA A4L
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LDA #>AUXMOS
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STA A4H
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:L1 LDA (A1L)
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STA (A4L)
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LDA A1H
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CMP A2H
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BNE :S1
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LDA A1L
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CMP A2L
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BNE :S1
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BRA :S4
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:S1 INC A1L
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BNE :S2
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INC A1H
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:S2 INC A4L
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BNE :S3
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INC A4H
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:S3 BRA :L1
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:S4 LDA #<MOSVEC-MOSINIT+AUXMOS1
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STA A1L
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LDA #>MOSVEC-MOSINIT+AUXMOS1
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STA A1H
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LDA #<MOSVEND-MOSINIT+AUXMOS1
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STA A2L
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LDA #>MOSVEND-MOSINIT+AUXMOS1
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STA A2H
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LDA #<MOSAPI
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STA A4L
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LDA #>MOSAPI
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STA A4H
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:L2 LDA (A1L)
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STA (A4L)
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LDA A1H
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CMP A2H
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BNE :S5
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LDA A1L
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CMP A2L
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BNE :S5
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BRA :S8
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:S5 INC A1L
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BNE :S6
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INC A1H
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:S6 INC A4L
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BNE :S7
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INC A4H
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:S7 BRA :L2
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2021-08-10 01:27:44 +00:00
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:NORELOC ; We should jump up into high memory here
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2021-08-08 02:48:24 +00:00
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:S8 STA $C00D ; 80 col on
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STA $C003 ; Alt charset off
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STA $C055 ; PAGE2
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2021-08-10 01:27:44 +00:00
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LDX #$FF
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TXS ; Initialise stack
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INX ; X=$00
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TXA
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:SCLR STA $0000,X ; Clear Kernel memory
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STA $0200,X
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STA $0300,X
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INX
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BNE :SCLR
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LDX #ENDVEC-DEFVEC-1
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:INITPG2 LDA DEFVEC,X ; Set up vectors
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2021-08-08 02:48:24 +00:00
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STA $200,X
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DEX
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BPL :INITPG2
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2021-08-10 01:27:44 +00:00
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2021-08-19 20:11:53 +00:00
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JSR VDUINIT ; Initialise VDU driver
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2021-08-08 02:48:24 +00:00
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LDA #<:HELLO
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LDY #>:HELLO
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JSR PRSTR
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2021-08-20 22:35:31 +00:00
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CLC
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JMP BYTE8E ; Enter language ROM
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2021-08-08 02:48:24 +00:00
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2021-08-15 02:34:02 +00:00
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:HELLO DB $07
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ASC 'Applecorn MOS v0.01'
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2021-08-08 02:48:24 +00:00
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DB $0D,$0D,$00
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