311 lines
8.8 KiB
ArmAsm
311 lines
8.8 KiB
ArmAsm
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* MISC.S
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********
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* Misc functions and API entry block
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*
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* OSBYTE $80 - ADVAL
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************************************
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* Read input device or buffer status
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BYTE80 LDY #$00 ; Prepare return=&00xx
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TXA ; X<0 - info about buffers
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BMI ADVALBUF ; X>=0 - read input devices
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*
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* TEST CODE
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CPX #$7F
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BNE ADVALNONE
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ADVALWAIT JSR KBDREAD
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BCC ADVALWAIT
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TAX
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RTS
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* TEST CODE
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*
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ADVALNONE LDX #$00 ; Input, just return 0
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RTS
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ADVALBUF INX
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BEQ :ADVALKBD ; Fake keyboard buffer
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INX
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BEQ :ADVALOK ; Serial input, return 0
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LDX #$01 ; For outputs, return 1 char free
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RTS
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:ADVALKBD BIT $C000 ; Test keyboard data/strobe
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BPL :ADVALOK ; No Strobe, return 0
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INX ; Strobe, return 1
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:ADVALOK RTS
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******************
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* Helper functions
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******************
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* Beep
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BEEP PHA
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PHX
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*
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* A nicer beep
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* 1.023MHz clock
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*
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PHY
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LDY #$00 ; 2cy duration
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*
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* $C1 975cy = 524.6Hz = C5 slightly sharp
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* (actually sounds like E5 on my Casio)
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* $6B 546cy = 936.8Hz = A5# sharp - close to Apple BEEP
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* $60 491cy = 1041.7Hz = C6 slightly sharp
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*
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:L1 LDX #$60 ; 2cy pitch 2cy
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*------------------------------------------------
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:L2 DEX ; 2cy 193 * 2cy
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BNE :L2 ; 3cy/2cy 192 * 3cy + 1 * 2cy
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*------------------------------------------------
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* 964cy
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LDA $C030 ; 4cy 4cy
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DEY ; 2cy 2cy
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BNE :L1 ; 2cy/3cy 3cy
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PLY ; 975cy = 524.6Hz = C5
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*
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* LDX #$20
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*:L1 LDA $C030
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* JSR DELAY
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* INX
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* BNE :L1
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*
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PLX
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PLA
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RTS
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* Delay approx 1/100 sec
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DELAY PHX
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PHY
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LDX #$00
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:L1 INX ; 2
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LDY #$00 ; 2
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:L2 INY ; 2
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CPY #$00 ; 2
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BNE :L2 ; 3 (taken)
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CPX #$02 ; 2
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BNE :L1 ; 3 (taken)
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PLY
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PLX
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RTS
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* Print string pointed to by X,Y to the screen
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OUTSTR TXA
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* Print string pointed to by A,Y to the screen
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PRSTR STA OSTEXT+0 ; String in A,Y
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STY OSTEXT+1
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:L1 LDA (OSTEXT) ; Ptr to string in ZP3
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BEQ :S1
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JSR OSASCI
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INC OSTEXT
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BNE :L1
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INC OSTEXT+1
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BRA :L1
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:S1 RTS
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* Print XY in hex
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OUT2HEX TYA
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JSR OUTHEX
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TAX ; Continue into OUTHEX
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* Print hex byte in A
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OUTHEX PHA
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LSR
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LSR
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LSR
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LSR
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AND #$0F
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JSR PRNIB
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PLA
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AND #$0F ; Continue into PRNIB
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* JSR PRNIB
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* RTS
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* Print hex nibble in A
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PRNIB CMP #$0A
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BCC :S1
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CLC ; >= $0A
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ADC #'A'-$0A
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JSR OSWRCH
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RTS
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:S1 ADC #'0' ; < $0A
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JMP OSWRCH
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**********************************************************
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* Interrupt Handlers, MOS redirection vectors etc.
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**********************************************************
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* IRQ/BRK handler
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IRQBRKHDLR
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PHA
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* >>> WRTMAIN
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* STA $45 ; A->$45 for ProDOS IRQ handlers
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* >>> WRTAUX
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* Mustn't enable IRQs within the IRQ handler
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* Do this manually, as we have complete control at this point
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STA $C004 ; Write to main memory
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STA $45 ; $45=A for ProDOS IRQ handlers
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STA $C005 ; Write to aux memory
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;
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TXA
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PHA
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CLD
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TSX
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LDA $103,X ; Get PSW from stack
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AND #$10
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BEQ :IRQ ; IRQ
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SEC
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LDA $0104,X
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SBC #$01
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STA FAULT
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LDA $0105,X
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SBC #$00
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STA FAULT+1
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PLA
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TAX
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PLA
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CLI
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JMP (BRKV) ; Pass on to BRK handler
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:IRQ >>> XF2MAIN,A2IRQ ; Bounce to Apple IRQ handler
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IRQBRKRET
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PLA ; TODO: Pass on to IRQ1V
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TAX
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PLA
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NULLRTI RTI
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PRERR LDY #$01
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PRERRLP LDA (FAULT),Y
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BEQ PRERR1
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JSR OSWRCH
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INY
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BNE PRERRLP
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NULLRTS
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PRERR1 RTS
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MOSBRKHDLR LDA #<MSGBRK
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LDY #>MSGBRK
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JSR PRSTR
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JSR PRERR
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JSR OSNEWL
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JSR OSNEWL
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STOP JMP STOP ; Cannot return from a BRK
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MSGBRK DB $0D
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ASC "ERROR: "
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DB $00
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RDROM LDA #<OSRDRMM
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LDY #>OSRDRMM
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JMP PRSTR
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OSRDRMM ASC 'OSRDDRM.'
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DB $00
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EVENT LDA #<OSEVENM
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LDY #>OSEVENM
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JMP PRSTR
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OSEVENM ASC 'OSEVEN.'
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DB $00
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GSINTGO LDA #<OSINITM
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LDY #>OSINITM
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JMP PRSTR
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OSINITM ASC 'GSINITM.'
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DB $00
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GSRDGO LDA #<OSREADM
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LDY #>OSREADM
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JMP PRSTR
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OSREADM ASC 'GSREAD.'
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DB $00
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* Default page 2 contents
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DEFVEC DW NULLRTS ; $200 USERV
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DW MOSBRKHDLR ; $202 BRKV
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DW NULLRTI ; $204 IRQ1V
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DW NULLRTI ; $206 IRQ2V
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DW CLIHND ; $208 CLIV
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DW BYTEHND ; $20A BYTEV
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DW WORDHND ; $20C WORDV
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DW WRCHHND ; $20E WRCHV
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DW RDCHHND ; $210 RDCHV
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DW FILEHND ; $212 FILEV
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DW ARGSHND ; $214 ARGSV
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DW BGETHND ; $216 BGETV
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DW BPUTHND ; $218 BPUTV
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DW GBPBHND ; $21A GBPBV
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DW FINDHND ; $21C FINDV
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DW FSCHND ; $21E FSCV
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ENDVEC
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*
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* Acorn MOS entry points at the top of RAM
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* Copied from loaded code to high memory
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*
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* Base of API entries here in loaded code
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MOSVEC
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* Real base of API entries in real memory
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MOSAPI EQU $FFB6
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ORG MOSAPI
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* OPTIONAL ENTRIES
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* ----------------
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*OSSERV JMP NULLRTS ; FF95 OSSERV
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*OSCOLD JMP NULLRTS ; FF98 OSCOLD
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*OSPRSTR JMP OUTSTR ; FF9B PRSTRG
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*OSFF9E JMP NULLRTS ; FF9E
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*OSSCANHEX JMP RDHEX ; FFA1 SCANHX
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*OSFFA4 JMP NULLRTS ; FFA4
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*OSFFA7 JMP NULLRTS ; FFA7
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*PRHEX JMP OUTHEX ; FFAA PRHEX
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*PR2HEX JMP OUT2HEX ; FFAD PR2HEX
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*OSFFB0 JMP NULLRTS ; FFB0
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*OSWRRM JMP NULLRTS ; FFB3 OSWRRM
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* COMPULSARY ENTRIES
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* ------------------
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VECSIZE DB ENDVEC-DEFVEC ; FFB6 VECSIZE Size of vectors
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VECBASE DW DEFVEC ; FFB7 VECBASE Base of default vectors
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OSRDRM JMP RDROM ; FFB9 OSRDRM Read byte from paged ROM
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OSCHROUT JMP OUTCHAR ; FFBC CHROUT Send char to VDU driver
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OSEVEN JMP EVENT ; FFBF OSEVEN Signal an event
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GSINIT JMP GSINTGO ; FFC2 GSINIT Init string reading
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GSREAD JMP GSRDGO ; FFC5 GSREAD Parse general string
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NVWRCH JMP WRCHHND ; FFC8 NVWRCH Nonvectored WRCH
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NVRDCH JMP RDCHHND ; FFCB NVRDCH Nonvectored RDCH
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OSFIND JMP (FINDV) ; FFCE OSFIND
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OSGBPB JMP (GBPBV) ; FFD1 OSGBPB
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OSBPUT JMP (BPUTV) ; FFD4 OSBPUT
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OSBGET JMP (BGETV) ; FFD7 OSBGET
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OSARGS JMP (ARGSV) ; FFDA OSARGS
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OSFILE JMP (FILEV) ; FFDD OSFILE
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OSRDCH JMP (RDCHV) ; FFE0 OSRDCH
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OSASCI CMP #$0D ; FFE3 OSASCI
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BNE OSWRCH
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OSNEWL LDA #$0A ; FFE7 OSNEWL
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JSR OSWRCH
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OSWRCR LDA #$0D ; FFEC OSWRCR
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OSWRCH JMP (WRCHV) ; FFEE OSWRCH
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OSWORD JMP (WORDV) ; FFF1 OSWORD
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OSBYTE JMP (BYTEV) ; FFF4 OSBYTE
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OSCLI JMP (CLIV) ; FFF7 OSCLI
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NMIVEC DW NULLRTI ; FFFA NMIVEC
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RSTVEC DW STOP ; FFFC RSTVEC
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IRQVEC
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* Assembler doesn't like running up to $FFFF, so we bodge a bit
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MOSEND
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ORG MOSEND-MOSAPI+MOSVEC
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DW IRQBRKHDLR ; FFFE IRQVEC
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MOSVEND
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* Buffer for one 512 byte disk block in aux mem
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AUXBLK DS $200
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