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Applecorn
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Experimenting with *KEY code.

This commit is contained in:
jgharston 2022-12-14 15:03:55 +00:00 committed by GitHub
parent 462819cdb6
commit 2298a611ef
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4 changed files with 299 additions and 280 deletions
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2
auxmem.bytwrd.s
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@ -34,7 +34,7 @@ BYTWRDADDR DW BYTE00 ; OSBYTE 0 - Machine host - INIT.
DW BYTENULL ; OSBYTE 15 - Flush buffer type DW BYTENULL ; OSBYTE 15 - Flush buffer type
DW BYTENULL ; OSBYTE 16 - ADC channel max DW BYTENULL ; OSBYTE 16 - ADC channel max
DW BYTENULL ; OSBYTE 17 - ADC channel start DW BYTENULL ; OSBYTE 17 - ADC channel start
DW BYTENULL ; OSBYTE 18 - Clear soft keys DW BYTE12 ; OSBYTE 18 - Clear soft keys
DW BYTENULL ; OSBYTE 19 - Wait for VSync DW BYTENULL ; OSBYTE 19 - Wait for VSync
DW BYTENULL ; OSBYTE 20 - Font explode DW BYTENULL ; OSBYTE 20 - Font explode
DW BYTENULL ; OSBYTE 21 - Buffer flush DW BYTENULL ; OSBYTE 21 - Buffer flush

141
auxmem.chario.s
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@ -33,6 +33,7 @@
* 03-Nov-2022 Escape: Fixed INKEY loop failing if entering with previous Escape, * 03-Nov-2022 Escape: Fixed INKEY loop failing if entering with previous Escape,
* combined with EscAck clearing keyboard. * combined with EscAck clearing keyboard.
* 06-Dec-2022 Moved *KEY into here. * 06-Dec-2022 Moved *KEY into here.
* 12-Dec-2022 Test code to write *KEY data to mainmem.
* Hardware locations * Hardware locations
@ -264,7 +265,7 @@ NEGCALL >>> XF2MAIN,MACHRD ; Try to read Machine ID
* SOFT KEY PROCESSING * SOFT KEY PROCESSING
===================== * ===================
* *KEY <num> <GSTRANS string> * *KEY <num> <GSTRANS string>
* --------------------------- * ---------------------------
@ -280,6 +281,7 @@ ERRKEYUSED BRK
DB $FA DB $FA
ASC 'Key in use' ASC 'Key in use'
BRK BRK
*
* A slightly fiddly procedure, as we need to check the new * A slightly fiddly procedure, as we need to check the new
* definition is valid before we insert it, we can't bomb * definition is valid before we insert it, we can't bomb
* out halfway through inserting a string, and we mustn't * out halfway through inserting a string, and we mustn't
@ -315,64 +317,65 @@ ERRKEYUSED BRK
* SOFTBUF+16/33 -> free space after last byte last definition * SOFTBUF+16/33 -> free space after last byte last definition
* definitions stored in key order * definitions stored in key order
* *
* Bobbi's initial layout: * Initial development layout:
* 00/01 - 1E/1F -> pointers to start of each string * 00..0F -> length of string 0..15
* 20/21 -> pointer to end of all strings * 10... -> strings in key order
* (len0+len1+...len15) => start of free space
* *
* Bobbi's initial scheme: STARKEY1 TAX ; X=key number
* NOTE - THIS WRITES TO AUX MEM AT THE MOMENT. SHOULD BE MAIN!!
KEYBUF EQU $400 ; *KEY buffer from $400-$7FF
; Beware of the screen holes!
KEYBUFFREE EQU KEYBUF + $20 ; Free space word
STARKEY1
ASL A ; Key num * 2
PHA ; Preserve for later
JSR SKIPCOMMA JSR SKIPCOMMA
LDA KEYBUFFREE+0 ; Free space LS byte *
STA OSTEXT+0 * Test code
PLX ; Recover key num * 2 * Just parse the string and write it to mainmem
PHX SEC
STA KEYBUF,X ; Store LS byte start address JSR GSINIT ; Initialise '*KEY-type string'
LDA KEYBUFFREE+1 ; Free space MS byte LDX #0 ; Parse string and check it's valid
STA OSTEXT+1 STARKEYLP1 JSR GSREAD
PLX ; Recover key num * 2 BCS STARKEYEND
STA KEYBUF+1,X ; Store MS byte start address JSR WRHOLES ; Store the byte
:L1 LDA (OSLPTR),Y ; Read char from input INX
STA (OSTEXT) ; Store in buffer BRA STARKEYLP1
PHA
INY ; Advance source index STARKEYEND RTS
JSR INCKEYPTR ; Advance dest pointer
PLA
CMP #$0D ; Carriage return?
BNE :L1 * Write a byte to mainmem screen avoiding holes
:S1 LDA OSTEXT+0 WRHOLES BIT SETV
STA KEYBUFFREE+0 ; Free space LS byte BRA RDWRHOLE
LDA OSTEXT+1 * Read a byte from mainmem screen avoiding holes
STA KEYBUFFREE+1 ; Free space MS byte RDHOLES CLV
RDWRHOLE PHP ; Save IRQ state
SEI ; Disable IRQs
PHP ; Save V=rd/wr
PHA ; Save byte to write
TXA ; C=? A=abcdefgh
AND #$BF ; C=? A=a0cdefgh
STA OSINTWS+0
TXA ; C=? A=abcdefgh
ASL A ; C=a A=bcdefgh0
ASL A ; C=b A=cdefgh00
LDA #$02 ; C=b A=00000010
ROL A ; C=0 A=0000010b
STA OSINTWS+1 ; (OSINTWS)=>$400+x or $500+x
PLA ; Get byte to write back
PLP ; Get rd/wr back
BVC RDHOLE2
STA WRMAINRAM ; &0200-&BFFF writes to main memory
STA (OSINTWS)
STA WRCARDRAM ; &0200-&BFFF writes to aux memory
PLP ; Restore IRQs
RTS
RDHOLE2 STA RDMAINRAM ; &0200-&BFFF reads from main memory
LDA (OSINTWS)
STA RDCARDRAM ; &0200-&BFFF reads from aux memory
PLP ; Restore IRQs
RTS RTS
* Increment OSTEXT, skipping over screen holes
* Screen holes are $478-$47F, $4F8-$4FF
* $578-$57F, $5F8-$5FF
* $678-$67F, $6F8-$6FF
* $778-$77F, $7F8-$7FF
INCKEYPTR LDA OSTEXT+0 ; Least significant byte
INC A
STA OSTEXT+0
AND #$F8
CMP #$78 ; If $78 to $7F
BEQ :HOLE78
CMP #$F8 ; If $F8 to $FF
BEQ :HOLEF8
RTS
:HOLE78 LDA #$80
STA OSTEXT+0
RTS
:HOLEF8 STZ OSTEXT+0
INC OSTEXT+1
RTS
* OSBYTE &12 - Clear soft keys * OSBYTE &12 - Clear soft keys
* ---------------------------- * ----------------------------
@ -380,24 +383,22 @@ SOFTKEYCHK LDA FXSOFTOK
BEQ BYTE12OK ; Soft keys ok, exit BEQ BYTE12OK ; Soft keys ok, exit
BYTE12 LDX #120 ; 120 bytes in each half page BYTE12 LDX #120 ; 120 bytes in each half page
STX FXSOFTOK ; Soft keys being updated STX FXSOFTOK ; Soft keys being updated
PHP
* Bobbi's initial scheme SEI ; Prevent IRQs while writing
>>> WRTMAIN LDA #0
BYTE12LP STZ $0400-1,X ; Could be more efficient STA WRMAINRAM ; Write to main mem
STZ $0480-1,X BYTE12LP STA $0400-1,X ; Could be more efficient
STZ $0500-1,X STA $0480-1,X ; If use 16xlen, only need to
STZ $0580-1,X STA $0500-1,X ; zero first 16 bytes
STZ $0600-1,X STA $0580-1,X ; Gives 4*120=480 bytes
STZ $0680-1,X * STA $0600-1,X
STZ $0700-1,X * STA $0680-1,X
STZ $0780-1,X * STA $0700-1,X
* STA $0780-1,X
DEX DEX
BNE BYTE12LP BNE BYTE12LP
LDA #<KEYBUFFREE+2 ; Initialize start of *KEY free-space STA WRCARDRAM ; Restore writing to aux
STA KEYBUFFREE+0 PLP ; And restore IRQs
STA KEYBUFFREE+1
>>> WRTAUX
*
STX FXSOFTOK ; Soft keys updated STX FXSOFTOK ; Soft keys updated
BYTE12OK RTS BYTE12OK RTS

76
auxmem.init.s
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@ -4,6 +4,7 @@
* Initialization code running in Apple //e aux memory * Initialization code running in Apple //e aux memory
* 08-Nov-2022 ResetType OSBYTE set * 08-Nov-2022 ResetType OSBYTE set
* 09-Nov-2022 Current language re-entered, reset on Power/Hard Reset * 09-Nov-2022 Current language re-entered, reset on Power/Hard Reset
* 12-Dec-2022 Copy loop uses OSvars, single byte for MODBRA jump.
* BUG: If Ctrl-Break pressed during a service call, wrong ROM gets paged in * BUG: If Ctrl-Break pressed during a service call, wrong ROM gets paged in
@ -22,6 +23,8 @@ ZP1 EQU $90 ; $90-$9f are spare Econet space
ZP2 EQU $92 ZP2 EQU $92
ZP3 EQU $94 ZP3 EQU $94
*STRTBCKL EQU $9D ; *TO DO* No longer needed to preserve
*STRTBCKH EQU $9E
MOSSHIM MOSSHIM
ORG AUXMOS ; MOS shim implementation ORG AUXMOS ; MOS shim implementation
@ -42,30 +45,35 @@ MOSSHIM
MOSINIT SEI ; Ensure IRQs disabled MOSINIT SEI ; Ensure IRQs disabled
LDX #$FF ; Initialize Alt SP to $1FF LDX #$FF ; Initialize Alt SP to $1FF
TXS TXS
* Ensure memory map set up:
STA WRCARDRAM ; Make sure we are writing aux STA WRCARDRAM ; Make sure we are writing aux
STA 80STOREOFF ; Make sure 80STORE is off STA 80STOREOFF ; Make sure 80STORE is off
STA SET80VID ; 80 col on
STA CLRALTCHAR ; Alt charset off
STA PAGE2 ; PAGE2
LDA LCBANK1 ; LC RAM Rd/Wt, 1st 4K bank LDA LCBANK1 ; LC RAM Rd/Wt, 1st 4K bank
LDA LCBANK1 LDA LCBANK1
LDY #$00 ; $00=Soft Reset
:MODBRA BRA :RELOC ; NOPped out on first run
BRA :NORELOC
LDY #$00 ; $00=Soft Reset
:MODBRA SEC ; Changed to CLC after first run
BCC :NORELOC ; Subsequent run, skip to code
* BRA :RELOC ; NOPped out on first run
* BRA :NORELOC
* Copy code to high memory, (OSCTRL)=>source, (OSLPTR)=>dest
:RELOC LDA #<AUXMOS1 ; Source :RELOC LDA #<AUXMOS1 ; Source
STA ZP1+0 STA OSCTRL+0
LDA #>AUXMOS1 LDA #>AUXMOS1
STA ZP1+1 STA OSCTRL+1
LDA #<AUXMOS ; Dest STY OSLPTR+0 ; Y=0 from earlier
STA ZP2+0 LDA #>AUXMOS ; AUXMOS is always &xx00
LDA #>AUXMOS STA OSLPTR+1
STA ZP2+1 ; Y=0 from earlier :L1 LDA (OSCTRL),Y ; Copy from source
:L1 LDA (ZP1),Y ; Copy from source STA (OSLPTR),Y ; to dest
STA (ZP2),Y ; to dest
INY INY
BNE :L1 ; Do 256 bytes BNE :L1 ; Do 256 bytes
INC ZP1+1 ; Update source INC OSCTRL+1 ; Update source
INC ZP2+1 ; Update dest INC OSLPTR+1 ; Update dest
BMI :L1 ; Loop until wrap past &FFFF BMI :L1 ; Loop until wrap past &FFFF
* *
:L2 LDA MOSVEND-AUXMOS+AUXMOS1-256,Y :L2 LDA MOSVEND-AUXMOS+AUXMOS1-256,Y
@ -73,14 +81,21 @@ MOSINIT SEI ; Ensure IRQs disabled
INY ; to proper place INY ; to proper place
BNE :L2 BNE :L2
LDA #$EA ; NOP opcode LDA #$18 ; CLC opcode, next time around, we're
STA :MODBRA+0 ; Next time around, we're already STA :MODBRA ; already in high memory
STA :MODBRA+1 ; in high memory * Changing only one byte ensures against a RESET happening halfway between
* two bytes being changed - and is five bytes shorter!
* LDA #$EA ; NOP opcode
* STA :MODBRA+0 ; Next time around, we're already
* STA :MODBRA+1 ; in high memory
LDY #$02 ; $02=PowerOn LDY #$02 ; $02=PowerOn
:NORELOC STA SET80VID ; 80 col on :NORELOC
STA CLRALTCHAR ; Alt charset off * STA SET80VID ; 80 col on
STA PAGE2 ; PAGE2 * STA CLRALTCHAR ; Alt charset off
* STA PAGE2 ; PAGE2
JMP MOSHIGH ; Ensure executing in high memory from here JMP MOSHIGH ; Ensure executing in high memory from here
* From here onwards we are always executing at $D000 onwards * From here onwards we are always executing at $D000 onwards
@ -91,7 +106,7 @@ MOSHIGH SEI ; Ensure IRQs disabled
TXS ; Initialise stack TXS ; Initialise stack
PHY ; Stack ResetType PHY ; Stack ResetType
LDA FXLANG ; A=Language LDA FXLANG ; A=Language
LDY FXSOFTOK ; A=Language, Y=Soft Keys Ok LDY FXSOFTOK ; Y=Soft Keys Ok
INX ; X=$00 INX ; X=$00
:SCLR STZ $0000,X ; Clear Kernel memory :SCLR STZ $0000,X ; Clear Kernel memory
@ -134,19 +149,19 @@ MOSHIGH SEI ; Ensure IRQs disabled
* *
* Find a language to enter * Find a language to enter
:INITSOFT LDX FXLANG ; Get current language :INITSOFT LDX FXLANG ; Get current language
BPL :INITLANG ; b7=ok, use it BPL INITLANG ; b7=ok, use it
LDX ROMMAX ; Look for a language LDX ROMMAX ; Look for a language
:FINDLANG JSR ROMSELECT ; Bring ROM X into memory :FINDLANG JSR ROMSELECT ; Bring ROM X into memory
BIT $8006 ; Check ROM type BIT $8006 ; Check ROM type
BVS :INITLANG ; b6=set, use it BVS INITLANG ; b6=set, use it
DEX ; Step down to next ROM DEX ; Step down to next ROM
BPL :FINDLANG ; Loop until all tested BPL :FINDLANG ; Loop until all tested
BRK ; No language found ERRNOLANG BRK ; No language found
DB $F9 DB $F9
ASC 'No Language' ASC 'No Language'
BRK BRK
* *
:INITLANG CLC ; CLC=Entering from RESET INITLANG CLC ; CLC=Entering from RESET
* OSBYTE $8E - Enter language ROM * OSBYTE $8E - Enter language ROM
********************************* *********************************
@ -154,7 +169,8 @@ MOSHIGH SEI ; Ensure IRQs disabled
* *
BYTE8E PHP ; Save CLC=RESET, SEC=Not RESET BYTE8E PHP ; Save CLC=RESET, SEC=Not RESET
JSR ROMSELECT ; Bring ROM X into memory JSR ROMSELECT ; Bring ROM X into memory
STX FXLANG ; Set as current language ROM BIT $8006
BVC ERRNOLANG ; No language in this ROM
LDA #$00 LDA #$00
STA FAULT+0 STA FAULT+0
LDA #$80 LDA #$80
@ -164,6 +180,7 @@ BYTE8E PHP ; Save CLC=RESET, SEC=Not RESET
STY FAULT+0 ; FAULT pointing to version string STY FAULT+0 ; FAULT pointing to version string
JSR OSNEWL JSR OSNEWL
JSR OSNEWL JSR OSNEWL
STX FXLANG ; Set as current language ROM
PLP ; Get entry type back PLP ; Get entry type back
LDA #$01 ; $01=Entering code with a header LDA #$01 ; $01=Entering code with a header
JMP ROMAUXADDR JMP ROMAUXADDR
@ -214,9 +231,8 @@ BYTE00 BEQ BYTE00A ; OSBYTE 0,0 - generate error
RTS ; %000x1xxx host type, 'A'pple RTS ; %000x1xxx host type, 'A'pple
BYTE00A BRK BYTE00A BRK
DB $F7 DB $F7
HELLO ASC 'Applecorn MOS 2022-11-11' HELLO ASC 'Applecorn MOS 2022-11-08'
DB $00 ; Unify MOS messages DB $00 ; Unify MOS messages
* TO DO: Move into RAM * TO DO: Move into RAM
GSSPEED DB $00 ; $80 if GS is fast, $00 for slow * GSSPEED DB $00 ; $80 if GS is fast, $00 for slow

8
auxmem.mosequ.s
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@ -18,7 +18,7 @@
* DEBUG EQU $00 ; $00=*OPT 255 debug code removed * DEBUG EQU $00 ; $00=*OPT 255 debug code removed
DEBUG EQU $E0 ; $E0=*OPT 255 debug code included DEBUG EQU $E0 ; $E0=*OPT 255 debug code included
* GSSPEED EQU $E1 ; $E1 **TEMP** GSSPEED EQU $E1 ; $E1 $80 if GS is fast, $00 for slow
FSFLAG1 EQU $E2 ; $E2 FSFLAG1 EQU $E2 ; $E2
FSFLAG2 EQU $E3 ; $E3 HOSTFS *OPT settings FSFLAG2 EQU $E3 ; $E3 HOSTFS *OPT settings
GSFLAG EQU $E4 ; $E4 GSREAD processing flags GSFLAG EQU $E4 ; $E4 GSREAD processing flags
@ -51,7 +51,7 @@ ESCFLAG EQU $FF ; $FF Escape status
* $0200-$0235 Vectors * $0200-$0235 Vectors
* $0236-$028F OSBYTE variables ($190+BYTENUM) * $0236-$028F OSBYTE variables ($190+BYTENUM)
* $0290-$02ED * $0290-$02ED VDU workspace
* $02EE-$02FF MOS control block * $02EE-$02FF MOS control block
USERV EQU $200 ; USER vector USERV EQU $200 ; USER vector
@ -75,4 +75,6 @@ OSGBPBCB EQU OSFILECB+1 ; OSGBPB control block
* $0300-$03DF * $0300-$03DF
* $03E0-$03FF Used for interfacing with ProDOS XFER * $03E0-$03EF Used for interfacing with ProDOS XFER
* $03F0-$03FF