Apple-2-SW
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Applecorn
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Updated build date, comments.

This commit is contained in:
Bobbi Webber-Manners 2022-11-08 18:13:07 -05:00
parent 29a88b0226
commit 27201eb646
2 changed files with 2 additions and 2 deletions
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applecorn.po
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4
auxmem.init.s
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@ -30,7 +30,7 @@ MOSSHIM
*
* Initially executing at $2000 until copied to $D000
*
* When running with BRUN APPLECORN:
* When running APLCORN.SYSTEM:
* Code will be at $2000-$4FFF, then copied to $D000-$FFFF
* When Ctrl-Reset pressed:
* AUX RESET code jumps to MAIN $D000
@ -226,7 +226,7 @@ BYTE00 BEQ BYTE00A ; OSBYTE 0,0 - generate error
RTS ; %000x1xxx host type, 'A'pple
BYTE00A BRK
DB $F7
HELLO ASC 'Applecorn MOS 2022-11-04'
HELLO ASC 'Applecorn MOS 2022-11-08'
DB $00 ; Unify MOS messages
* TO DO: Move into RAM
GSSPEED DB $00 ; $80 if GS is fast, $00 for slow