228 lines
8.5 KiB
ArmAsm
228 lines
8.5 KiB
ArmAsm
* AUXMEM.INIT.S
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* (c) Bobbi 2021 GPL v3
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*
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* Initialization code running in Apple //e aux memory
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* 08-Nov-2022 ResetType OSBYTE set
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* 09-Nov-2022 Current language re-entered, reset on Power/Hard Reset
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* 12-Dec-2022 Copy loop uses OSvars, single byte for MODBRA jump.
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* 15-Dec-2022 Added check for *FX200,2/3 force PowerOn reset.
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* BUG: If Ctrl-Break pressed during a service call, wrong ROM gets paged in
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***********************************************************
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* BBC Micro 'virtual machine' in Apple //e aux memory
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***********************************************************
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MAXROM EQU $F9 ; Max sideways ROM number
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FXLANG EQU BYTEVARBASE+$FC ; Current language
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FXRESET EQU BYTEVARBASE+$FD ; Last Reset type
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FXOPTIONS EQU BYTEVARBASE+$FF ; Startup options
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ZP1 EQU $90 ; $90-$9f are spare Econet space
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; so safe to use
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ZP2 EQU $92
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ZP3 EQU $94
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MOSSHIM
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ORG AUXMOS ; MOS shim implementation
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*
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* Shim code to service Acorn MOS entry points using
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* Apple II monitor routines
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* This code is initially loaded into aux mem at AUXMOS1
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* Then relocated into aux LC at AUXMOS by MOSINIT
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*
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* Initially executing at $2000 until copied to $D000
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*
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* When first run from loading from disk:
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* Code will be at $2000-$4FFF, then copied to $D000-$FFFF
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* When Ctrl-Reset pressed:
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* AUX RESET code jumps to MAIN $D000
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*
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MOSINIT SEI ; Ensure IRQs disabled
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LDX #$FF ; Initialize Alt SP to $1FF
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TXS
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* Ensure memory map set up:
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STA WRCARDRAM ; Make sure we are writing aux
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STA 80STOREOFF ; Make sure 80STORE is off
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STA SET80VID ; 80 col on
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STA CLRALTCHAR ; Alt charset off
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STA PAGE2 ; PAGE2
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LDA LCBANK1 ; LC RAM Rd/Wt, 1st 4K bank
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LDA LCBANK1
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* (Move these later to prevent brief glimpse of screen with code in it?)
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LDY #$00 ; $00=Soft Reset
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:MODBRA SEC ; Changed to CLC after first run
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BCC :NORELOC ; Subsequent run, skip to code
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* Copy code to high memory, (OSCTRL)=>source, (OSLPTR)=>dest
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:RELOC LDA #<AUXMOS1 ; Source
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STA OSCTRL+0
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LDA #>AUXMOS1
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STA OSCTRL+1
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STY OSLPTR+0 ; Y=0 from earlier
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LDA #>AUXMOS ; AUXMOS is always &xx00
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STA OSLPTR+1
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:L1 LDA (OSCTRL),Y ; Copy from source
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STA (OSLPTR),Y ; to dest
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INY
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BNE :L1 ; Do 256 bytes
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INC OSCTRL+1 ; Update source
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INC OSLPTR+1 ; Update dest
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BMI :L1 ; Loop until wrap past &FFFF
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*
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:L2 LDA MOSVEND-AUXMOS+AUXMOS1-256,Y
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STA $FF00,Y ; Copy MOS API and vectors
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INY ; to proper place
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BNE :L2
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LDA #$18 ; CLC opcode, next time around, we're
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STA :MODBRA ; already in high memory
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LDY #$02 ; $02=PowerOn
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* We only change one byte to protect against a RESET happening halfway between
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* two bytes being changed, leaving the code inconsistant.
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:NORELOC JMP MOSHIGH ; Ensure executing in high memory from here
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* From here onwards we are always executing at $D000 onwards
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* Y=ResetType
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MOSHIGH SEI ; Ensure IRQs disabled
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LDX #$FF
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TXS ; Initialise stack
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LDA FX200VAR ; Check *FX200
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AND #$02 ; Check if bit 1 set
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BEQ :SCLR0 ; No, keep existing ResetType
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TAY ; Otherwise, force to PowerOn reset
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:SCLR0 PHY ; Stack ResetType
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LDA FXLANG ; A=Language
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LDY FXSOFTOK ; Y=Soft Keys Ok
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INX ; X=$00
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:SCLR STZ $0000,X ; Clear Kernel memory
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STZ $0200,X
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STZ $0300,X
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INX
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BNE :SCLR
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STA FXLANG ; Current language
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STY FXSOFTOK ; Soft key validity
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PLA
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STA FXRESET ; Set ResetType
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BEQ :INITPG2 ; Soft Reset, preserve settings
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DEX ; X=$FF
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STX FXLANG ; Current language=none
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STX FXSOFTOK ; Invalidate soft keys
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:INITPG2 LDX #ENDVEC-DEFVEC-1
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:INITPG2LP LDA DEFVEC,X ; Set up vectors
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STA $200,X
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DEX
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BPL :INITPG2LP
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LDA CYAREG ; GS speed register
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AND #$80 ; Speed bit only
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STA GSSPEED ; In Alt LC for IRQ/BRK hdlr
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JSR ROMINIT ; Build list of sideways ROMs
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JSR KBDINIT ; Returns A=startup MODE
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JSR VDUINIT ; Initialise VDU driver
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JSR PRHELLO
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JSR OSNEWL
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LDA FXRESET ; Get ResetType
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BEQ :INITSOFT ; Soft reset, skip past
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LDA #7 ; Beep on HardReset/PowerReset
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JSR OSWRCH
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*
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* AppleII MOS beeps anyway, so we always get a Beep
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* APPLECORN startup -> BBC Beep
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* Press Ctrl-Reset -> AppleII Beep
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*
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* Find a language to enter
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:INITSOFT LDX FXLANG ; Get current language
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BPL INITLANG ; b7=ok, use it
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LDX ROMMAX ; Look for a language
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:FINDLANG JSR ROMSELECT ; Bring ROM X into memory
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BIT $8006 ; Check ROM type
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BVS INITLANG ; b6=set, use it
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DEX ; Step down to next ROM
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BPL :FINDLANG ; Loop until all tested
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ERRNOLANG BRK ; No language found
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DB $F9
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ASC 'No Language'
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BRK
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*
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INITLANG CLC ; CLC=Entering from RESET
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* OSBYTE $8E - Enter language ROM
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*********************************
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* X=ROM number to select, CC=RESET, CS=*COMMAND/OSBYTE
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*
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BYTE8E PHP ; Save CLC=RESET, SEC=Not RESET
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JSR ROMSELECT ; Bring ROM X into memory
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BIT $8006
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BVC ERRNOLANG ; No language in this ROM
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LDA #$00
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STA FAULT+0
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LDA #$80
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STA FAULT+1
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LDY #$09
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JSR PRERRLP ; Print ROM name with PRERR to set
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STY FAULT+0 ; FAULT pointing to version string
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JSR OSNEWL
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JSR OSNEWL
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STX FXLANG ; Set as current language ROM
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PLP ; Get entry type back
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LDA #$01 ; $01=Entering code with a header
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JMP ROMAUXADDR
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* OSBYTE $8F - Issue service call
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*********************************
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* X=service call, Y=parameter
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*
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* SERVICE TAX ; Enter here with A=Service Num
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SERVICEX
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BYTE8F LDA $F4 ; Enter here with X=Service Number
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PHA ; Save current ROM
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*DEBUG
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LDA $E0
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AND #$20 ; Test debug *OPT255,32
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BEQ :SERVDEBUG
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CPX #$06
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BEQ :SERVDONE ; If debug on, ignore SERV06
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:SERVDEBUG
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*DEBUG
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TXA ; A=service number
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LDX ROMMAX ; Start at highest ROM
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:SERVLP JSR ROMSELECT ; Bring it into memory
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BIT $8006
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BPL :SERVSKIP ; No service entry
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JSR $8003 ; Call service entry
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TAX
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BEQ :SERVDONE
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:SERVSKIP LDX $F4 ; Restore X=current ROM
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DEX ; Step down to next
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BPL :SERVLP ; Loop until ROM 0 done
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:SERVDONE PLA ; Get caller's ROM back
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PHX ; Save return from service call
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TAX
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JSR ROMSELECT ; Restore caller's ROM
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PLX ; Get return value back
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TXA ; Return in A and X and set EQ/NE
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RTS
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PRHELLO LDX #<HELLO
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LDY #>HELLO
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JSR OSPRSTR
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JMP OSNEWL
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BYTE00 BEQ BYTE00A ; OSBYTE 0,0 - generate error
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LDX #$0A ; Identify Host
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RTS ; %000x1xxx host type, 'A'pple
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BYTE00A BRK
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DB $F7
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