mirror of
https://github.com/bobbimanners/Applecorn.git
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185 lines
5.3 KiB
ArmAsm
185 lines
5.3 KiB
ArmAsm
* AUXMEM.INIT.S
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* (c) Bobbi 2021 GPL v3
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*
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* Initialization code running in Apple //e aux memory
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***********************************************************
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* BBC Micro 'virtual machine' in Apple //e aux memory
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***********************************************************
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ZP1 EQU $90 ; $90-$9f are spare Econet space
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; so safe to use
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ZP2 EQU $92
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ZP3 EQU $94
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** COL,ROW needs to be in X,Y order
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** TO DO: will be moved to VDU space
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*COL EQU $96 ; Cursor column
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*ROW EQU $97 ; Cursor row
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STRTBCKL EQU $9D ; *TO DO* don't need to preserve
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STRTBCKH EQU $9E
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MOSSHIM
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ORG AUXMOS ; MOS shim implementation
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*
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* Shim code to service Acorn MOS entry points using
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* Apple II monitor routines
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* This code is initially loaded into aux mem at AUXMOS1
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* Then relocated into aux LC at AUXMOS by MOSINIT
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*
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* Initially executing at $3000 until copied to $D000
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MOSINIT LDX #$FF ; Initialize Alt SP to $1FF
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TXS
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STA $C005 ; Make sure we are writing aux
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STA $C000 ; Make sure 80STORE is off
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LDA $C08B ; LC RAM Rd/Wt, 1st 4K bank
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LDA $C08B
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:MODBRA BRA :RELOC ; NOPped out on first run
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BRA :NORELOC
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LDA #$EA ; NOP opcode
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STA :MODBRA
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STA :MODBRA+1
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:RELOC LDA #<AUXMOS1 ; Relocate MOS shim
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STA A1L
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LDA #>AUXMOS1
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STA A1H
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LDA #<EAUXMOS1
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STA A2L
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LDA #>EAUXMOS1
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STA A2H
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LDA #<AUXMOS
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STA A4L
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LDA #>AUXMOS
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STA A4H
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:L1 LDA (A1L)
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STA (A4L)
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LDA A1H
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CMP A2H
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BNE :S1
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LDA A1L
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CMP A2L
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BNE :S1
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BRA :S4
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:S1 INC A1L
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BNE :S2
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INC A1H
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:S2 INC A4L
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BNE :S3
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INC A4H
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:S3 BRA :L1
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:S4 LDA #<MOSVEC-MOSINIT+AUXMOS1
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STA A1L
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LDA #>MOSVEC-MOSINIT+AUXMOS1
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STA A1H
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LDA #<MOSVEND-MOSINIT+AUXMOS1
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STA A2L
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LDA #>MOSVEND-MOSINIT+AUXMOS1
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STA A2H
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LDA #<MOSAPI
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STA A4L
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LDA #>MOSAPI
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STA A4H
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:L2 LDA (A1L)
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STA (A4L)
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LDA A1H
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CMP A2H
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BNE :S5
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LDA A1L
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CMP A2L
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BNE :S5
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BRA :S8
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:S5 INC A1L
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BNE :S6
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INC A1H
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:S6 INC A4L
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BNE :S7
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INC A4H
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:S7 BRA :L2
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:NORELOC
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:S8 STA $C00D ; 80 col on
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STA $C003 ; Alt charset off
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STA $C055 ; PAGE2
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JMP MOSHIGH ; Ensure executing in high memory here
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MOSHIGH SEI
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LDX #$FF
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TXS ; Initialise stack
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INX ; X=$00
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TXA
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:SCLR STA $0000,X ; Clear Kernel memory
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STA $0200,X
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STA $0300,X
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INX
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BNE :SCLR
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LDX #ENDVEC-DEFVEC-1
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:INITPG2 LDA DEFVEC,X ; Set up vectors
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STA $200,X
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DEX
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BPL :INITPG2
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JSR KBDINIT ; Returns A=startup MODE
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JSR VDUINIT ; Initialise VDU driver
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JSR PRHELLO
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LDA #7
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JSR OSWRCH
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JSR OSNEWL
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CLC
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* JMP BYTE8E
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* OSBYTE $8E - Enter language ROM
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*
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BYTE8E PHP ; Save CLC=RESET, SEC=Not RESET
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LDA #$00
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STA FAULT+0
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LDA #$80
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STA FAULT+1
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LDY #$09
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JSR PRERRLP ; Print ROM name with PRERR to set
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STY FAULT+0 ; FAULT pointing to version string
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JSR OSNEWL
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JSR OSNEWL
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PLP ; Get entry type back
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LDA #$01
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JMP AUXADDR
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* OSBYTE $8F - Issue service call
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* X=service call, Y=parameter
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*
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BYTE8F
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SERVICEX TXA
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SERVICE LDX #$0F
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BIT $8006
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BPL :SERVSKIP ; No service entry
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JSR $8003 ; Call service entry
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TAX
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BEQ :SERVDONE
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:SERVSKIP LDX #$FF
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:SERVDONE RTS
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PRHELLO LDA #<HELLO
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LDY #>HELLO
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JSR PRSTR
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JMP OSNEWL
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BYTE00XX BEQ BYTE00A ; OSBYTE 0,0 - generate error
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LDX #$0A ; $00 = identify Host
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RTS ; %000x1xxx host type, 'A'pple
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BYTE00A BRK
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DB $F7
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HELLO ASC 'Applecorn MOS 2021-09-21'
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DB $00 ; Unify MOS messages
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