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caf6ddd745
All files refreshed. Config now shows uppercase when using a ][+ Minor bug fixes in logon.seg.s Newer XDOS external with bug fixes
338 lines
4.7 KiB
ArmAsm
338 lines
4.7 KiB
ArmAsm
PAG
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********************************
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* *
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* ACOS.OBJ - Math *
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* *
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********************************
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DATE
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*-------------------------------
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DO_PLUS LDA NUMB+1 ;save old number
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PHA
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LDA NUMB
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PHA
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JSR INPMATH ;get next part
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CLC
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PLA
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ADC NUMB ;do add
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TAX
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PLA
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ADC NUMB+1
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JMP DO_MATH ;finish up
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DO_SUB LDA NUMB+1 ;save initial value
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PHA
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LDA NUMB
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PHA
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JSR INPMATH ;get other amount
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SEC
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PLA
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SBC NUMB ;do actual subtraction
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TAX
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PLA
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SBC NUMB+1
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DO_MATH STX DATA+1 ;save result
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STA DATA+2
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LDY #1
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STY DATA ;set data type 1
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RTS
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*-------------------------------
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* do multiply
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*-------------------------------
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DO_MULT JSR DO_MLDV ;command mult/divd
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JSR DO_MUL0 ;do multiply
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*-------------------------------
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* finish up routine for signed operands
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*-------------------------------
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DO_MLD2 LDX RESULT
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LDA RESULT+1
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BPL :DO_MLD3
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LDX #num2big
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JMP BADERR ;overflow > 32767
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:DO_MLD3 BIT SIGN
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BPL DO_MATH
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JSR NEGXA
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JMP DO_MATH
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DO_MLDV JSR GETNUMB ;get first number
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STA SIGN ;save this sign
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JSR DO_ABS1 ;make it positive
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STX DATA+1 ;save it
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STA DATA+2
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JSR INPNUM0 ;get next number
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EOR SIGN ;make into result sign
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STA SIGN
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LDA NUMB+1 ;get this sign
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JSR DO_ABS1 ;make this positive too
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STX NUMB ;save it
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STA NUMB+1
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RTS
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*-------------------------------
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* actual multiply routine
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*-------------------------------
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DO_MUL0 LDA #0
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STA RESULT
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STA RESULT+1
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STA RESULT+2
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STA DATA+3
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LDX #16
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:DO_MUL1 LSR NUMB+1
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ROR NUMB ;put bit 0 into carry
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BCC :DO_MUL2
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CLC
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LDA DATA+1
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ADC RESULT
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STA RESULT ;add in multiplyer
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LDA DATA+2
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ADC RESULT+1
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STA RESULT+1 ;add in multiplyer
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LDA DATA+3
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ADC RESULT+2
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STA RESULT+2
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:DO_MUL2 ASL DATA+1 ;multiply all 16 bits
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ROL DATA+2
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ROL DATA+3
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DEX
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BNE :DO_MUL1
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RTS
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*-------------------------------
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* divide routine
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*-------------------------------
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DO_DIVD JSR DO_DIV1 ;do divide
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JMP DO_MLD2
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DO_MOD JSR DO_DIV1 ;do divide
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LDA REMAIN ;get remainder
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STA RESULT
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LDA REMAIN+1
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STA RESULT+1
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JMP DO_MLD2 ;finish up
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DO_DIV1 JSR DO_MLDV
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LDA NUMB
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ORA NUMB+1
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BEQ :DO_DIV5
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LDA #0
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STA REMAIN ;clear remainder
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STA REMAIN+1
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CLC
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LDX #16
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:DO_DIV2 ROL DATA+1 ;shift up the carry bit
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ROL DATA+2
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ROL REMAIN
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ROL REMAIN+1
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SEC
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LDA REMAIN ;check for remainder > divisor
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SBC NUMB
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TAY
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LDA REMAIN+1
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SBC NUMB+1
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BCC :DO_DIV3 ;nope, skip subtract
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STY REMAIN ;allow subtract to take place
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STA REMAIN+1
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:DO_DIV3 DEX
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BNE :DO_DIV2
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ROL DATA+1 ;shift in quotent
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ROL DATA+2
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LDA DATA+1
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STA RESULT
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LDA DATA+2
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STA RESULT+1
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RTS
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:DO_DIV5 LDX #divby0 ;division by zero
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JMP BADERR
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*-------------------------------
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* absolute value
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*-------------------------------
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DO_ABS JSR INPARG
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JSR GETNUMB ;get number
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JSR DO_ABS1 ;get abs
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JMP DO_MATH ;finish up
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DO_ABS1 CMP #0
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BPL DO_ABS2 ;if it is already ok
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NEGXA PHA
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TXA
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EOR #-1
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TAX ;make positive
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PLA
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EOR #-1
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INX
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BNE DO_ABS2 ;and add 1
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CLC
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ADC #1
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DO_ABS2 RTS
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*-------------------------------
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* ----- compare routines -------
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*-------------------------------
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CP_EQ JSR CP_ST ;compare for equal
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JSR CMPEQ
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JMP CP_END
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CP_NOT JSR CP_ST ;compare if not equal
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JSR CMPEQ ;just inverse compare equal
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JSR INVERT
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JMP CP_END
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CP_LT JSR CP_ST ;compare if less than
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JSR CP_LTGT
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JSR CMPLT
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JMP CP_END
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CP_GT JSR CP_ST ;compare if greater than
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JSR CP_LTGT
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JSR CMPGT
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JMP CP_END
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CP_LTEQ JSR CP_ST ;compare if less than or equal
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JSR CP_LTGT
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JSR CMPGT ;just inverse compare greater than
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JSR INVERT
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JMP CP_END
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CP_GTEQ JSR CP_ST ;compare if greater than or equal
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JSR CP_LTGT
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JSR CMPLT ;just inverse compare less than
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JSR INVERT
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JMP CP_END
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CP_AND JSR CP_ST ;'and' 2 numbers
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LDA NUMB
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AND DATA+1
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TAX
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LDA NUMB+1
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AND DATA+2
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JMP CP_END
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CP_OR JSR CP_ST ;'or' 2 numbers
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LDA NUMB
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ORA DATA+1
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TAX
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LDA NUMB+1
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ORA DATA+2
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JMP CP_END
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CP_EOR JSR CP_ST ;'eor' 2 numbers
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LDA NUMB
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EOR DATA+1
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TAX
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LDA NUMB+1
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EOR DATA+2
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JMP CP_END
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CP_ST LDA NUMB ;compare start
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PHA
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LDA NUMB+1 ;just save stuff
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PHA
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JSR INPMATH
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PLA
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STA DATA+2
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PLA
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STA DATA+1
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RTS
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CP_LTGT LDA DATA+2
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EOR #hibit ;invert sign bits of numbers
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STA DATA+2
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LDA NUMB+1
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EOR #hibit
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STA NUMB+1
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RTS
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CP_END STX DATA+1
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STA DATA+2 ;save result
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LDY #1
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STY DATA
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RTS
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*-------------------------------
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* ----- logic operations -------
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*-------------------------------
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CMPEQ LDX #0
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LDA NUMB
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CMP DATA+1
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BNE :CMPEQ0
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LDA NUMB+1
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CMP DATA+2
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BNE :CMPEQ0
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INX
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:CMPEQ0 LDA #0
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RTS
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CMPLT LDX #0
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LDA NUMB+1
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CMP DATA+2
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BLT :CMPLT0
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BNE :CMPLT1
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LDA NUMB
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CMP DATA+1
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BEQ :CMPLT0
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BLT :CMPLT0
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:CMPLT1 INX
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:CMPLT0 LDA #0
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RTS
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CMPGT LDX #0
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LDA DATA+2
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CMP NUMB+1
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BLT :CMPGT0
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BNE :CMPGT1
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LDA DATA+1
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CMP NUMB
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BEQ :CMPGT0
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BLT :CMPGT0
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:CMPGT1 INX
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:CMPGT0 LDA #0
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RTS
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INVERT PHA ;change bit 0
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TXA
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EOR #1
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TAX
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PLA
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RTS
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