mirror of
https://github.com/garrettsworkshop/GWRAM.SYSTEM.git
synced 2024-09-29 07:56:01 +00:00
454 lines
7.2 KiB
ArmAsm
454 lines
7.2 KiB
ArmAsm
.setcpu "65816"
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.autoimport on
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.importzp sp
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.export _ram2gs_getsize
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.export _ram2gs_detect
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.export _ram2gs_cmd
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.define GetTWConfig $BCFF3C
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.define SetTWConfig $BCFF40
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.define DisableDataCache $BCFF4C
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.macro A8
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sep #$20 ; put the 65C816 in 8-bit accumulator mode
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.A8
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.endmacro
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.macro I8
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sep #$10 ; put the 65C816 in 8-bit index register mode
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.I8
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.endmacro
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.macro AI8
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sep #$30 ; put the 65C816 in 8-bit accumulator and index register mode
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.A8
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.I8
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.endmacro
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.macro A16
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rep #$20 ; put the 65C816 in 8-bit accumulator mode
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.A16
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.endmacro
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.macro I16
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rep #$10 ; put the 65C816 in 8-bit index register mode
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.I16
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.endmacro
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.macro AI16
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rep #$30 ; put the 65C816 in 8-bit accumulator and index register mode
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.A16
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.I16
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.endmacro
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.segment "CODE"
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.proc _thrash: near
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.A8
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.I8
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; Preamble
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php ; Push status
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AI16
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phb ; Push bank
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pha ; Push accumulator
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pha ; Push X
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phy ; Push Y
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; Read 0x100000-0x11FFFF
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AI8
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lda #$20 ; A = 0x10 (bank)
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_thrash_loop:
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pha ; Switch to bank stored in A
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plb
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AI16
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lda #$0000 ; Get index in A
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clc ; Clear carry in preparation to add in loop
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; Read loop
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_thrash_loop0:
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tax ; Get index from A into X to do LDYs
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ldy $0100,X ; Read 64 bytes
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ldy $0102,X ; ...
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ldy $0104,X
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ldy $0106,X
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ldy $0108,X
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ldy $010A,X
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ldy $010C,X
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ldy $010E,X
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ldy $0110,X
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ldy $0112,X
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ldy $0114,X
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ldy $0116,X
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ldy $0118,X
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ldy $011A,X
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ldy $011C,X
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ldy $011E,X
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ldy $0120,X
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ldy $0122,X
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ldy $0124,X
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ldy $0126,X
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ldy $0128,X
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ldy $012A,X
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ldy $012C,X
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ldy $012E,X
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ldy $0130,X
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ldy $0132,X
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ldy $0134,X
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ldy $0136,X
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ldy $0138,X
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ldy $013A,X
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ldy $013C,X
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ldy $013E,X
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adc #$0040 ; Add 64 to index in A
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cmp #0
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bne _thrash_loop0 ; Repeat if we haven't passed 0xFFFF
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; Bank increment
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AI8
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phb ; Transfer bank to A
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pla
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inc ; Increment bank
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cmp #$21 ; Stop after bank 0x20
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bne _thrash_loop
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; Postamble
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AI16
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ply ; Restore Y
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plx ; Restore X
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pla ; Restore accumulator
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plb ; Restore bank
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AI8
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plp ; Restore status
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rts
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.endproc
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.proc _unswap: near
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.A8
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.I8
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; Save current bank and accumulator
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phb
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pha
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; Switch to bank 0xFB
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lda #$FB
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pha
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plb
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; Submit C1AD
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lda #$C1
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sta $FFFE
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lda #$AD
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sta $FFFF
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; Pull and submit command
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lda #$00
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sta $FFFD
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; Restore accumulator and bank and return
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pla
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plb
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rts
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.endproc
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.proc _swap: near
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.A8
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.I8
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; Save current bank and accumulator
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phb
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pha
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; Switch to bank 0xFB
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lda #$FB
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pha
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plb
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; Submit C1AD
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lda #$C1
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sta $FFFE
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lda #$AD
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sta $FFFF
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; Pull and submit command
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lda #$01
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sta $FFFD
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; Restore accumulator and bank and return
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pla
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plb
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rts
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.endproc
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.proc _ram2gs_getsize: near
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.A8
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.I8
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; Preamble
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php ; Push status
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sei ; Disable interrupts
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clc ; Clear carry
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xce ; Clear emulation bit
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php ; Push status again, reflecting emulation bit
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phb ; Push bank
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; Check for TranswarpGS
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AI8
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lda #0
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pha ; Push "TWGS absent" flag
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; AI16
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; lda $BCFF00
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; cmp #$5754 ; "WT"
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; bne _ram2gs_getsize_notwgs1
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; lda $BCFF02
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; cmp #$5347 ; "SG"
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; bne _ram2gs_getsize_notwgs1
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;
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; ; Get and push TWGS config
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; jsl GetTWConfig
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; pha
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; ; Disable TWGS data cache
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; jsl DisableDataCache ; Disable data cache
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;
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; ; Pull to restore TWGS settings into A
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; pla
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; ; Pull "TWGS absent" flag into x, and discard it
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; AI8
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; plx
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; AI16
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; ; Push TWGS settings
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; pha
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; ; Push "TWGS exists" flag
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; AI8
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; ldx #1
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; phx
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_ram2gs_getsize_notwgs1:
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AI8
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; Go to bank 3F
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ldy #$3F
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phy
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plb
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; Save 3F/3456
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lda $3456
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pha
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; Go to bank 7F
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ldy #$7F
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phy
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plb
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; Save and then invert 7F/3456
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lda $3456
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pha
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eor #$FF
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sta $3456
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; Go to bank 3F
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ldy #$3F
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phy
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plb
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; Has 3F/3456 changed?
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jsr _thrash
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plx ; X = saved 7F/3456
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pla ; A = saved 3F/3456
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cmp $3456
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php ; Push to save processor status
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; Go to bank 7F
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ldy #$7F
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phy
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plb
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; Restore 3F/3456
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sta $3456
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; Go to bank 7F
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ldy #$7F
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phy
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plb
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; Restore 7F/3456
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stx $3456
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; Check result
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ldx #$80
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plp
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beq _ram2gs_getsize_return
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ldx #$40
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; Restore TWGS config
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_ram2gs_getsize_return:
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pla ; Pull TWGS flag
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phx ; Push to save return value
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; beq _ram2gs_getsize_post ; Skip if no TWGS
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; plx ; Get return value back
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; AI16
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; pla ; Pull TWGS config
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; AI8
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; phx
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; AI16
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; jsl SetTWConfig
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; AI8
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; Postamble
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_ram2gs_getsize_post:
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pla ; Pull return value
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plb ; Restore bank
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plp ; Restore status
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xce ; Restore emulation bit
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plp ; Pull status again to pull I flag
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rts
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.endproc
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.proc _ram2gs_detect: near
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.A8
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.I8
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; Preamble
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php ; Push status
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sei ; Disable interrupts
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clc ; Clear carry
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xce ; Clear emulation bit
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php ; Push status again, reflecting emulation bit
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phb ; Push bank
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; Check for TranswarpGS
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AI8
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lda #0
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pha ; Push "TWGS absent" flag
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; AI16
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; lda $BCFF00
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; cmp #$5754 ; "WT"
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; bne _ram2gs_detect_notwgs1
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; lda $BCFF02
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; cmp #$5347 ; "SG"
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; bne _ram2gs_detect_notwgs1
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;
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; ; Get and push TWGS config
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; jsl GetTWConfig
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; pha
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; ; Disable TWGS data cache
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; jsl DisableDataCache ; Disable data cache
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;
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; ; Pull to restore TWGS settings into A
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; pla
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; ; Pull "TWGS absent" flag into x, and discard it
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; AI8
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; plx
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; AI16
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; ; Push TWGS settings
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; pha
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; ; Push "TWGS exists" flag
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; AI8
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; ldx #1
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; phx
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_ram2gs_detect_notwgs1:
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AI8
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; Switch to bank 0x3F
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lda #$3F
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pha
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plb
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; Unswap
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jsr _unswap
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; Save unswapped 3F/8000
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jsr _thrash
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lda $8000
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pha
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; Swap
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jsr _swap
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; Save swapped 3F/8000
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jsr _thrash
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lda $8000
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pha
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; Store 0xFF in swapped
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lda #$FF
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sta $8000
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; Verify 0xFF stored
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jsr _thrash
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lda $8000
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cmp #$FF
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bne _ram2gs_detect_fail
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; Unswap
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jsr _unswap
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; Store 0x00 in unswapped
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lda #$00
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sta $8000
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; Verify 0x00 stored
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jsr _thrash
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lda $8000
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cmp #$00
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bne _ram2gs_detect_fail
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; Swap
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jsr _swap
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; Verify 0xFF stored
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jsr _thrash
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lda $8000
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cmp #$FF
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bne _ram2gs_detect_fail
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; Get success return value and jump to postamble
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ldx #$01 ; Get success falue
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bne _ram2gs_detect_done ; Jump to postamble
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; Fail
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_ram2gs_detect_fail:
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ldx #$00 ; Get fail value
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; Done, now put back clobbered bytes
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_ram2gs_detect_done:
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jsr _swap ; Swap
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pla ; Get value to restore to swapped bank 3F
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sta $8000 ; Restore
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jsr _unswap ; Unswap
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pla ; Get value to restore to unswapped bank 3F
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sta $8000 ; Restore
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; Restore TWGS config
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_ram2gs_detect_return:
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pla ; Pull TWGS flag
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phx ; Push to save return value
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; beq _ram2gs_detect_post ; Skip if no TWGS
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; plx ; Get return value back
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; AI16
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; pla ; Pull TWGS config
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; AI8
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; phx
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; AI16
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; jsl SetTWConfig
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; AI8
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; Postamble
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_ram2gs_detect_post:
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pla ; Pull return value
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plb ; Restore bank
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plp ; Restore status
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xce ; Restore emulation bit
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plp ; Pull status again to pull I flag
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rts
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.endproc
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.proc _ram2gs_cmd: near
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.A8
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.I8
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; Preamble
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php ; Push status
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sei ; Disable interrupts
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clc ; Clear carry
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xce ; Clear emulation bit
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php ; Push status again, reflecting emulation bit
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phb ; Push bank
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pha ; Push command in accumulator
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AI8
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; Switch to bank 0xFB
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lda #$FB
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pha
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plb
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; Submit C1AD
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lda #$C1
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sta $FFFE
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lda #$AD
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sta $FFFF
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; Pull and submit command
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pla
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sta $FFFD
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; Postamble
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plb ; Restore bank
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plp ; Restore status
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xce ; Restore emulation bit
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plp ; Pull status again to pull I flag
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rts
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.endproc
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