mirror of
https://github.com/brouhaha/a2-liron.git
synced 2024-05-28 14:41:26 +00:00
Divide by 7.
This commit is contained in:
Eric Smith
parent
0ea05c7922
commit
99eaf2fe34
117
liron-if.asm
117
liron-if.asm
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@ -177,7 +177,7 @@ Lcn14: ldx #$c0 + slotnum
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jmp shared_rom_entry
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; shared ROM space jumps here
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; continuation of Sc960 subroutine (in shared ROM)
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Lcn21: ldy #$00
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lda Z4b
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pha
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@ -319,16 +319,25 @@ Lcnf8: sec
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endm
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Sc800: jsr Scaee
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smartport_bus_write_packet:
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jsr Scaee
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jsr smartport_bus_enable
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ldy #$07
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jsr Scba9
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ldy #$07 ; bit 0 = 1: latch mode
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; bit 1 = 1: asynchronous
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; bit 2 = 1: timer disable
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; bit 3 = 0: slow mode (4 us bit cell)
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; bit 4 = 0: 7 MHz
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; bit 5 = 0: normal mode (not test)
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; bit 6 = 0: not reset
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jsr iwm_write_mode_reg
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lda iwm_sel_drive_2,x
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lda iwm_motor_on,x
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ldy #$32
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Lc813: lda iwm_q7l,x
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bmi Lc81f
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ldy #50
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Lc813: lda iwm_q7l,x ; read status reg
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bmi Lc81f ; wait for ACK/ deasserted (high)
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dey
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bne Lc813
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sec
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@ -336,7 +345,7 @@ Lc813: lda iwm_q7l,x
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; send packet sync sequence
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Lc81f: lda iwm_ph_0_on,x ; turn on REQ
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Lc81f: lda iwm_ph_0_on,x ; assert REQ
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ldy #packet_sync_sequence_len - 1
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lda #$ff
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@ -518,11 +527,11 @@ Sc93d: jsr get_slot_x
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bcs Lc949 ; always taken
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Lc943: lda iwm_q7l,x ; read status
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bmi Lc938 ; ACK (write protect)? no, keep waiting
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bmi Lc938 ; ACK asserted (low)? if not, keep waiting
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clc ; yes, so no error
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Lc949: lda iwm_ph_0_off,x ; turn off REQ
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Lc949: lda iwm_ph_0_off,x ; deassert REQ
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lda iwm_q6l,x
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rts
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@ -541,6 +550,7 @@ Sc95b: nop
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Lc95d: jmp Sc93d
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Sc960: lda #$00
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sta checksum
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lda Z54
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@ -558,19 +568,21 @@ Sc960: lda #$00
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jsr smartport_bus_enable
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lda iwm_q6h,x
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Lc97d: lda iwm_q7l,x
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Lc97d: lda iwm_q7l,x ; read status
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bpl Lc97d
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lda iwm_ph_0_on,x
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ldy #$1e
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Lc987: lda iwm_q6l,x
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bpl Lc987
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dey
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bmi Lc95d
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cmp #$c3
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bne Lc987
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ldy #30 ; need a $c3 sync byte in first 30 nibbles
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Lc987: lda iwm_q6l,x ; read a nibble
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bpl Lc987 ; loop if don't have a nibble yet
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dey ; too many attempts?
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bmi Lc95d ; yes, report error
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cmp #$c3 ; is it the sync byte?
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bne Lc987 ; loop if not
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ldy #$06
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Lc995: lda iwm_q6l,x
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bpl Lc995
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Lc995: lda iwm_q6l,x ; read a nibble
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bpl Lc995 ; loop if don't have a nibble yet
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and #$7f
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sta Z4b,y
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eor #$80
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@ -578,6 +590,7 @@ Lc995: lda iwm_q6l,x
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sta checksum
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dey
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bpl Lc995
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lda Z4c
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beq Lc9d3
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clc
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@ -586,6 +599,7 @@ Lc995: lda iwm_q6l,x
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lda Z55
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adc #$00
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sta Z57
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ldy #$00
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Lc9b9: lda iwm_q6l,x
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bpl Lc9b9
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@ -709,7 +723,7 @@ Lca97: lda Z4d
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lda Z4e
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sta gh_0778
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jsr Sc800
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jsr smartport_bus_write_packet
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lda gh_06f8
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sta Z4d
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@ -743,14 +757,26 @@ Lcac4: jsr Sc960
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Lcad8: rts
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Dcad9: fcb $00,$24,$49
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Dcadc: fcb $00,$04,$01
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Dcadf: fcb $00,$01,$02,$04,$09,$12
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Dcae5: fcb $00,$01,$02,$04,$01,$02
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; Tables of quotients and remainders from dividing multiples of 256 (page size)
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; by 7, from 0 to 2.
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page_div_7_tab:
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fcb $0000/7, $0100/7, $0200/7
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page_rem_7_tab:
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fcb $0000#7, $0100#7, $0200#7
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; Tables of quotients and remainders from dividing powers of 2, from 3 to 7,
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; by 7. Entry 0 not used
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pow2_div_7:
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fcb $00/7, $08/7, $10/7, $20/7, $40/7, $80/7 ; quotients
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pow2_rem_7:
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fcb $00#7, $08#7, $10#7, $20#7, $40#7, $80#7 ; remainder
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Dcaeb: fcb $00,$7f,$ff
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Scaee: ldx Z4e
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; prepare for transmitting a packet, including computing the
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; number of 7-byte groups and the number of "odd bytes"
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Scaee: ldx Z4e ; high byte of length
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beq Lcb05
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lda Z55
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sta Z57
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@ -762,32 +788,43 @@ Scaee: ldx Z4e
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Lcb00: clc
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adc Z54
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sta Z56
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Lcb05: lda Dcad9,x
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; divide high byte of length by 7 using table lookup
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Lcb05: lda page_div_7_tab,x
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sta Z4b
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lda Dcadc,x
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lda page_rem_7_tab,x
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sta Z4c
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ldx #$05
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lda Z4d
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sta Z59
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ldx #$05 ; start table lookup at entry for 2^7
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lda Z4d ; copy low byte of length
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sta Z59 ; to temp
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; convert and add low byte of lenght divided by 7, using table
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; lookup for each bit position from 2^7 down to 2^3
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and #$07
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tay
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Lcb18: asl Z59
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bcc Lcb31
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lda Dcae5,x
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lda pow2_rem_7,x
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Lcb1f: clc
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adc Z4c
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cmp #$07
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bcc Lcb28
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sbc #$07
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Lcb28: sta Z4c
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lda Dcadf,x
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lda pow2_div_7,x
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adc Z4b
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sta Z4b
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Lcb31: dex
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bmi Lcb3a
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bne Lcb18
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tya
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jmp Lcb1f
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Lcb3a: lda Z55
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pha
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lda #$00
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@ -851,17 +888,23 @@ Lcb95: ror Z41
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inc Z57
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Lcba8: rts
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Scba9: lda iwm_motor_off,x
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; returns with q6h, q7l
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iwm_write_mode_reg:
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lda iwm_motor_off,x
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lda iwm_q6h,x
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jmp Lcbb6
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Lcbb2: tya
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sta iwm_q7h,x
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sta iwm_q7h,x ; write mode reg
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Lcbb6: tya
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eor iwm_q7l,x
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eor iwm_q7l,x ; compare to low 5 bits of status reg
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and #$1f
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bne Lcbb2
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rts
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Scbbf: lda Z4b
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tay
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ldx #$00
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@ -1238,7 +1281,7 @@ Lce19: inc Z5a
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sta Z4d
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lda #$00
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sta Z4e
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jsr Sc800 ; send init command
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jsr smartport_bus_write_packet ; send init command
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bcc Lce2d
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dec Z5a
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