First implementation of auxmem tests

This commit is contained in:
Zellyn Hunter 2017-01-22 21:26:47 -05:00
parent 97232c4596
commit 0f8d0b1790
7 changed files with 549 additions and 59 deletions

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@ -7,13 +7,17 @@
START = *
;; Zero-page locations.
CSW = $36
KSW = $38
SCRATCH = $1
LCRESULT = $10
LCRESULT1 = $11
AUXRESULT = $12
CSW = $36
KSW = $38
PCL=$3A
PCH=$3B
;; AUXMOVE locations
;; $3C
;; $3D
@ -27,27 +31,54 @@
!addr DST = $08
!addr SHAINPUT = $eb
!addr SHALENGTH = $ee
!addr tmp1 = $fa
!addr tmp2 = $fb
!addr tmp3 = $fc
!addr tmp4 = $fd
!addr tmp5 = $fe
;; Softswitch locations.
_80STORE_OFF_W = $C000
_80STORE_ON_W = $C001
_80STORE_READ = $C018
RAMRD_OFF_W = $C002
RAMRD_ON_W = $C003
RAMRD_READ = $C013
RAMWRT_OFF_W = $C004
RAMWRT_ON_W = $C005
RAMWRT_READ = $C014
INTCXROM_OFF_W = $C006
INTCXROM_ON_W = $C007
INTCXROM_READ = $C015
ALTZP_OFF_W = $C008
ALTZP_ON_W = $C009
ALTZP_READ = $C016
SLOTC3ROM_OFF_W = $C00A
SLOTC3ROM_ON_W = $C00B
SLOTC3ROM_READ = $C017
SLOTRESET = $CFFF
RESET_80STORE = $C000
SET_80STORE = $C001
READ_80STORE = $C018
RESET_RAMRD = $C002
SET_RAMRD = $C003
READ_RAMRD = $C013
RESET_RAMWRT = $C004
SET_RAMWRT = $C005
READ_RAMWRT = $C014
RESET_INTCXROM = $C006
SET_INTCXROM = $C007
READ_INTCXROM = $C015
RESET_ALTZP = $C008
SET_ALTZP = $C009
READ_ALTZP = $C016
RESET_SLOTC3ROM = $C00A
SET_SLOTC3ROM = $C00B
READ_SLOTC3ROM = $C017
RESET_TEXT = $C050
SET_TEXT = $C051
READ_TEXT = $C01A
RESET_MIXED = $C052
SET_MIXED = $C053
READ_MIXED = $C01B
RESET_PAGE2 = $C054
SET_PAGE2 = $C055
READ_PAGE2 = $C01C
RESET_HIRES = $C056
SET_HIRES = $C057
READ_HIRES = $C01D
RESET_INTC8ROM = $CFFF
;; CXXX utility routine locations
AUXMOVE = $C311
@ -68,7 +99,7 @@
main:
;; Initialize stack to the top.
ldx $ff
ldx #$ff
txs
jsr standard_fixup
@ -197,7 +228,7 @@ standard_fixup:
COPYTOAUX
;; Use AUXMOVE routine to copy the whole program to AUX memory.
sta SLOTC3ROM_OFF_W
sta RESET_SLOTC3ROM
lda #<START
sta $3C
sta $42

Binary file not shown.

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@ -1,7 +1,27 @@
;;; Apple IIe Auxiliary memory audit routines
;;; Copyright © 2017 Zellyn Hunter <zellyn@gmail.com>
!zone auxmem {
!zone auxmem {
.MEM_1 = %00
.MEM_2 = %01
.MEM_3 = %10
.MEM_4 = %11
.MEM_2_1_1_1 = (.MEM_2 << 0) + (.MEM_1 << 2) + (.MEM_1 << 4) + (.MEM_1 << 6)
.MEM_3_2_2_2 = (.MEM_3 << 0) + (.MEM_2 << 2) + (.MEM_2 << 4) + (.MEM_2 << 6)
.C_1 = %001
.C_3 = %010
.C_8 = %100
.C_138 = .C_1 | .C_3 | .C_8
.checkdata = tmp1
.ismain = tmp3
.region = tmp4
.actual = tmp1
.desired = tmp2
AUXMEMTESTS
lda #0
sta AUXRESULT
@ -23,7 +43,7 @@ AUXMEMTESTS
+print
!text "LC FAILED BEFORE:SKIPPING AUXMEM LC",$8D
+printed
beq .afterlc
jmp .datadriventests
.auxlc ;; Run langcard tests in auxmem
@ -45,9 +65,9 @@ AUXMEMTESTS
jsr .zptoaux
sta ALTZP_ON_W
sta SET_ALTZP
jsr LANGCARDTESTS_NO_CHECK
sta ALTZP_OFF_W
sta RESET_ALTZP
jsr .zpfromaux
@ -85,7 +105,7 @@ AUXMEMTESTS
+
lda $FE1F
cmp #$44
beq .afterlc
beq .datadriventests
pha
+print
!text "WANT RAM $FE1F"
@ -102,41 +122,461 @@ AUXMEMTESTS
+prerred
sec
rts
.afterlc
;; Success
.success
lda #' '
sta $427
+print
!text "AUXMEM TESTS SUCCEEDED",$8D
+printed
lda #1
sta AUXRESULT
clc
.done
rts
;;; Main data-driven test. PCL,PCH holds the address of the next
;;; data-driven test routine. We expect the various softswitches
;;; to be reset each time we loop at .ddloop.
.datadriventests
lda #<.auxtests
sta PCL
lda #>.auxtests
sta PCH
;;; Main data-drive-test loop.
.ddloop
ldy #0
lda (PCL),Y
beq .success
lda #3
sta SET_ALTZP
sta SET_RAMWRT
sta SET_RAMRD
.initloop ; Loop twice: initialize aux to $3 and main to $1.
ldy #.memorylen
- ldx .memorylocs,y
stx + +1
ldx .memorylocs+1,y
stx + +2
+ sta $ffff ;; this address gets replaced
dey
dey
bpl -
sta RESET_ALTZP
sta RESET_RAMWRT
sta RESET_RAMRD
sec
sbc #2
bcs .initloop
jmp (PCL) ; Jump to test routine.
;; Test routine will JSR back to here, so the check data address is on the stack.
;; .checkdata (tmp1/tmp2) is the pointer to the current checkdata byte
;; .ismain (tmp3) is the main/aux loop counter.
;; .region (tmp4) is the zp/main/text/hires loop counter
.check
;; Increment all the test memory locations, so we can see what we were reading and writing.
inc $ff
inc $100
inc $200
inc $3ff
inc $427
inc $7ff
inc $800
inc $1fff
inc $2000
inc $3fff
inc $4000
inc $5fff
inc $bfff
;; pull address off of stack: it points just below check data for this test.
pla
sta .checkdata
pla
sta .checkdata+1
;; First checkdata byte is for Cxxx tests.
jsr .nextcheck
jsr .checkCxxx
ldx .checkdata
ldy .checkdata+1
jsr RESETALL
stx .checkdata
sty .checkdata+1
;; Do the next part twice.
lda #1
sta .ismain
jsr .nextcheck
.checkloop ; Loop twice here: once for main, once for aux.
lda #4
sta .region
ldx #$fe
ldy #0
.memlp inx
inx
lda .memorylocs,x
sta SRC
lda .memorylocs+1,x
sta SRC+1
ora SRC
beq .memlpinc
;; Perform the actual memory check.
lda (SRC),y
cmp (.checkdata),y
bne .checkerr
beq .memlp
.memlpinc
jsr .nextcheck
dec .region ; loop four times: zero, main, text, hires
bne .memlp
dec .ismain
bmi .checkdone
ldx .checkdata
ldy .checkdata+1
lda .ismain
sta SET_ALTZP
sta SET_RAMRD
sta SET_RAMWRT
stx .checkdata
sty .checkdata+1
sta .ismain
jmp .checkloop
.checkdone
;; Jump PCL,PCH to next test, and loop.
ldx .checkdata
ldy .checkdata+1
jsr RESETALL
stx PCL
sty PCH
jmp .ddloop
.checkerr
;; X = index of memory location
;; A = actual
;; Y = 0
;; desired = (.checkdata),y
pha
lda .ismain
clc
ror
ror
ora (.checkdata),y
tay
pla
;; Now:
;; X = index of memory location
;; A = actual
;; Y = desired | (high bit set if main, unset=aux)
jsr RESETALL
sta .actual
sty .desired
lda .memorylocs,x
sta SRC
lda .memorylocs+1,x
sta SRC+1
+print
!text "GOT $"
+printed
lda .actual
jsr PRBYTE
+print
!text " AT $"
+printed
ldx SRC
ldy SRC+1
jsr PRNTYX
lda .desired
bpl +
eor #$80
sta .desired
+print
!text " OF MAIN MEM (WANT $"
+printed
beq ++
+ +print
!text " OF AUX MEM (WANT $"
+printed
++
lda .desired
jsr PRBYTE
lda #')'
jsr COUT
lda #$8D
jsr COUT
jsr .printtest
+prerr $000A ;; E000A: This is a data-driven test of main and auxiliary memory softswitch operation. We initialize $FF, $100, $200, $3FF, $427, $7FF, $800, $1FFF, $2000, $3FFF, $4000, $5FFF, and $BFFF in main RAM to value 1, and in auxiliary RAM to value 3. Then, we perform a testdata-driven sequence of instructions. Finally we (try to) increment all test locations. Then we test the expected values of the test locations in main and auxiliary memory. For more information on the operation of the auxiliary memory soft-switches, see Understanding the Apple IIe, by James Fielding Sather, Pg 5-22 to 5-28.
!text "FOLLOWED BY INC OF TEST LOCATIONS. SEE"
+prerred
sec
rts
;;; Check that the expected ROM areas are visible.
.checkCxxx
rts
;;; Increment .checkdata pointer to the next memory location, and load
;;; it into the accumulator. X and Y are preserved.
.nextcheck
inc .checkdata
bne +
inc .checkdata+1
+ sty SCRATCH
ldy #0
lda (.checkdata),y
ldy SCRATCH
ora #0
rts
;;; Print out the sequence of instructions at PCL,PCH, until we hit a JSR.
.printtest
+print
!text "AFTER SEQUENCE",$8D
+printed
-
ldy #0
lda (PCL),y
cmp #$20
beq +++
lda #'-'
jsr COUT
lda #' '
jsr COUT
ldx #0
lda (PCL,x)
jsr $f88e
ldx #3
jsr $f8ea
jsr $f953
sta PCL
sty PCH
lda #$8D
jsr COUT
jmp -
+++ rts
;;; Copy zero page to aux mem. Assumes zp pointing at main mem, and leaves it that way.
.zptoaux
ldx #0
- sta ALTZP_OFF_W
- sta RESET_ALTZP
lda 0,x
sta ALTZP_ON_W
sta SET_ALTZP
sta 0,x
inx
bne -
sta ALTZP_OFF_W
sta RESET_ALTZP
rts
;;; Copy zero page from aux mem. Assumes zp pointing at main mem, and leaves it that way.
.zpfromaux
ldx #0
- sta ALTZP_ON_W
- sta SET_ALTZP
lda 0,x
sta ALTZP_OFF_W
sta RESET_ALTZP
sta 0,x
inx
bne -
rts
.auxtests
;; Our four basic tests --------------------------------------
;; Test 1: everything reset.
lda #1
jsr .check
!byte .C_138, 2, 2, 2, 2, 3, 3, 3, 3
;; Test 2: write to AUX but read from Main RAM, everything else normal.
lda #2
sta SET_RAMWRT
jsr .check
!byte .C_138, 2, 1, 1, 1, 3, 2, 2, 2
;; Test 3: write to main but read AUX, everything else normal.
lda #3
sta SET_RAMRD
jsr .check
!byte .C_138, 2, 4, 4, 4, 3, 3, 3, 3
;; Test 4: write to AUX, read from AUX, everything else normal.
lda #4
sta SET_RAMRD
sta SET_RAMWRT
jsr .check
!byte .C_138, 2, 1, 1, 1, 3, 4, 4, 4
;; Our four basic tests, but with 80STORE ON -----------------
;; (400-7ff is pointing at main mem)
;; Test 5: everything reset.
lda #5
sta SET_80STORE
jsr .check
!byte .C_138, 2, 2, 2, 2, 3, 3, 3, 3
;; Test 6: write to aux
lda #6
sta SET_RAMWRT
sta SET_80STORE
jsr .check
!byte .C_138, 2, 1, 2, 1, 3, 2, 3, 2
;; Test 7: read from aux
lda #7
sta SET_RAMRD
sta SET_80STORE
jsr .check
!byte .C_138, 2, 4, 2, 4, 3, 3, 3, 3
;; Test 8: read and write aux
lda #8
sta SET_RAMRD
sta SET_RAMWRT
sta SET_80STORE
jsr .check
!byte .C_138, 2, 1, 2, 1, 3, 4, 3, 4
;; Our four basic tests, but with 80STORE and PAGE2 ON -------
;; (400-7ff is pointing at aux mem)
;; Test 9: everything reset.
lda #9
sta SET_80STORE
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 2, 1, 2, 3, 3, 4, 3
;; Test A: write to aux
lda #$a
sta SET_RAMWRT
sta SET_80STORE
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 1, 1, 1, 3, 2, 4, 2
;; Test B: read from aux
lda #$b
sta SET_RAMRD
sta SET_80STORE
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 4, 1, 4, 3, 3, 4, 3
;; Test C: read and write aux
lda #$c
sta SET_RAMRD
sta SET_RAMWRT
sta SET_80STORE
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 1, 1, 1, 3, 4, 4, 4
;; Our four basic tests, but with 80STORE and HIRES ON -------
;; (400-7ff and 2000-3fff are pointing at main mem)
;; Test D: everything reset.
lda #$d
sta SET_80STORE
sta SET_HIRES
jsr .check
!byte .C_138, 2, 2, 2, 2, 3, 3, 3, 3
;; Test E: write to aux
lda #$e
sta SET_RAMWRT
sta SET_80STORE
sta SET_HIRES
jsr .check
!byte .C_138, 2, 1, 2, 2, 3, 2, 3, 3
;; Test F: read from aux
lda #$f
sta SET_RAMRD
sta SET_80STORE
sta SET_HIRES
jsr .check
!byte .C_138, 2, 4, 2, 2, 3, 3, 3, 3
;; Test 10: read and write aux
lda #$10
sta SET_RAMRD
sta SET_RAMWRT
sta SET_80STORE
sta SET_HIRES
jsr .check
!byte .C_138, 2, 1, 2, 2, 3, 4, 3, 3
;; Our four basic tests, but with 80STORE, HIRES, PAGE2 ON ---
;; (400-7ff and 2000-3fff are pointing at aux mem)
;; Test 11: everything reset.
lda #$11
sta SET_80STORE
sta SET_HIRES
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 2, 1, 1, 3, 3, 4, 4
;; Test 12: write to aux
lda #$12
sta SET_RAMWRT
sta SET_80STORE
sta SET_HIRES
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 1, 1, 1, 3, 2, 4, 4
;; Test 13: read from aux
lda #$13
sta SET_RAMRD
sta SET_80STORE
sta SET_HIRES
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 4, 1, 1, 3, 3, 4, 4
;; Test 14: read and write aux
lda #$14
sta SET_RAMRD
sta SET_RAMWRT
sta SET_80STORE
sta SET_HIRES
sta SET_PAGE2
jsr .check
!byte .C_138, 2, 1, 1, 1, 3, 4, 4, 4
!byte 0 ; end of tests
.memorylocs
;; zero page locations
!word $ff, $100, 0
;; main memory locations
!word $200, $3ff, $800, $1fff, $4000, $5fff, $bfff, 0
;; text locations
!word $427, $7ff, 0
;; hires locations
!word $2000, $3fff, 0
;; end
.memorylen = * - .memorylocs - 2
!word 0
} ;auxmem

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@ -296,8 +296,8 @@ LANGCARDTESTS_NO_CHECK:
!byte $23, $34, $11, $23, $34 ;
!byte $07, $0D, $ff ; Read $C087, read $C08D (read ROM, write bank 1)
!byte $53, $60, $54, $22, $61 ;
!byte $0b, $8b, $0b, $ff ; Read $C08B, write $C08B, read $C08B (read RAM bank 1, no write)
!byte $11, $33, $11, $22, $33 ; (this one is tricky: reset WRTCOUNT by writing halfway)
; !byte $0b, $8b, $0b, $ff ; Read $C08B, write $C08B, read $C08B (read RAM bank 1, no write)
; !byte $11, $33, $11, $22, $33 ; (this one is tricky: reset WRTCOUNT by writing halfway)
!byte $ff
nop ; Provide clean break after data when viewing disassembly

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@ -122,13 +122,12 @@ F88E: A8 185 INSDS2 TAY
LDX #0
LDA (PCL,X)
PHA
JSR F88E
JSR F88E (INSDS2)
LDX #3
JSR F8EA
JSR F953
STA PCL
STY PCH
PLA
RTS
* Auxmem tests
@ -143,11 +142,14 @@ Plan:
Each test is a set of actual instructions, followed by a jsr, and a list of memory check data.
Keep test locations in PCL,PCH.
Check data:
- zero/main/text/hires main mem
- zero/main/text/hires aux mem
- zero page current/main/aux: $ff, $100
- main current/main/aux: $200, $3ff, $800, $1fff, $4000, $5fff, $bfff
- text: $400, $7ff
- hires: $2000, $3fff
- CXXX ROM: 1=c300-c3ff, 2=c100-c2ff+c400-c7ff, 3=c800-cffe
- CXXX ROM: 1=c300-c3ff, 2=c100-c2ff+c400-c7ff, 4=c800-cffe
For each test:
- Test location is in PCL,PCH.
@ -158,7 +160,7 @@ For each test:
- pull address off the stack, so it knows where the check data is
- compare with check data
- if we get a problem:
Y=index of memory address in a table, X=desired | current/main/aux, A=actual
X=index of memory address in a table, Y=desired | high-bit-set=main/unset=aux, A=actual
JMP to error routine:
- restore normal memory configuration
- save xya
@ -185,3 +187,8 @@ For each test:
* Softswitch tests
Just switch them on and off, and test each, one at a time.
* Auxmem with mame
On entry into AUXMEMTESTS
SP: 01FE
returned to 02A0

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@ -3,26 +3,34 @@
!zone resetall {
;;; Reset all soft-switches to known-good state. Burns X and Y, but preserves A.
;;; Reset all soft-switches to known-good state. Burns $300 and $301 in main mem.
RESETALL
tax ; Save A in X until we return
;; Save return address in Y and A, in case we switch zero-page memory.
sta RESET_RAMRD
sta RESET_RAMWRT
stx $300
sta $301
;; Save return address in X and A, in case we switch zero-page memory.
pla
tay
tax
pla
sta _80STORE_OFF_W
sta RAMRD_OFF_W
sta RAMWRT_OFF_W
sta INTCXROM_OFF_W
sta ALTZP_OFF_W
sta SLOTC3ROM_OFF_W
sta SLOTRESET
sta RESET_80STORE
sta RESET_INTCXROM
sta RESET_ALTZP
sta RESET_SLOTC3ROM
sta RESET_INTC8ROM
sta SET_TEXT
sta RESET_MIXED
sta RESET_PAGE2
sta RESET_HIRES
;; Restore return address from Y and A.
;; Restore return address from X and A.
pha
tya
txa
pha
txa ; Restore A
ldx $300
lda $301
rts
}

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@ -35,3 +35,7 @@ We tried to run the langcard tests again with auxmem (ALTZP active), and they fa
## E0009
We wrote $44 to main RAM in the three test locations used by the LC test. They should have been unaffected by the LC test while it was using auxmem, but at least one of them was modified.
## E000A
This is a data-driven test of main and auxiliary memory softswitch operation. We initialize $FF, $100, $200, $3FF, $427, $7FF, $800, $1FFF, $2000, $3FFF, $4000, $5FFF, and $BFFF in main RAM to value 1, and in auxiliary RAM to value 3. Then, we perform a testdata-driven sequence of instructions. Finally we (try to) increment all test locations. Then we test the expected values of the test locations in main and auxiliary memory. For more information on the operation of the auxiliary memory soft-switches, see Understanding the Apple IIe, by James Fielding Sather, Pg 5-22 to 5-28.