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https://github.com/zellyn/a2audit.git
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audit: convert langcard tests to executable style
This commit is contained in:
parent
b98edea9a0
commit
dda6de609e
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@ -193,6 +193,7 @@ end:
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!src "monitor-routines.asm"
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!src "monitor-routines.asm"
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!src "keyboard.asm"
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!src "keyboard.asm"
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!src "video.asm"
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!src "video.asm"
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!src "printtest.asm"
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;!src "shasumtests.asm"
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;!src "shasumtests.asm"
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print
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print
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BIN
audit/audit.dsk
BIN
audit/audit.dsk
Binary file not shown.
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@ -24,8 +24,8 @@
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.region = tmp4
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.region = tmp4
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.actual = tmp1
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.actual = tmp1
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.desired = tmp2
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.desired = tmp2
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AUXMEMTESTS
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AUXMEMTESTS
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lda #0
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lda #0
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sta AUXRESULT
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sta AUXRESULT
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@ -55,7 +55,7 @@ AUXMEMTESTS
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sta LCRESULT1
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sta LCRESULT1
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lda #0
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lda #0
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sta LCRESULT
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sta LCRESULT
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;; Store distinct values in RAM areas, to see if they stay safe.
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;; Store distinct values in RAM areas, to see if they stay safe.
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lda $C08B ; Read and write bank 1
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lda $C08B ; Read and write bank 1
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lda $C08B
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lda $C08B
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@ -68,7 +68,7 @@ AUXMEMTESTS
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sta $D17B
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sta $D17B
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jsr zptoaux
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jsr zptoaux
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sta SET_ALTZP
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sta SET_ALTZP
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jsr LANGCARDTESTS_NO_CHECK
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jsr LANGCARDTESTS_NO_CHECK
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sta RESET_ALTZP
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sta RESET_ALTZP
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@ -83,7 +83,7 @@ AUXMEMTESTS
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+prerred
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+prerred
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sec
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sec
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rts
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rts
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;; Check that the stuff we stashed in main RAM was unaffected.
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;; Check that the stuff we stashed in main RAM was unaffected.
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+
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+
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lda $C088 ; Read bank 1
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lda $C088 ; Read bank 1
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@ -147,7 +147,7 @@ AUXMEMTESTS
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lda #>.auxtests
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lda #>.auxtests
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sta PCH
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sta PCH
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;;; Main data-drive-test loop.
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;;; Main data-drive-test loop.
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.ddloop
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.ddloop
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ldy #0
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ldy #0
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lda (PCL),Y
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lda (PCL),Y
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beq .success
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beq .success
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@ -171,7 +171,7 @@ AUXMEMTESTS
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sta RESET_ALTZP
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sta RESET_ALTZP
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sta RESET_RAMWRT
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sta RESET_RAMWRT
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sta RESET_RAMRD
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sta RESET_RAMRD
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sec
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sec
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sbc #2
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sbc #2
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bcs .initloop
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bcs .initloop
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@ -205,7 +205,7 @@ AUXMEMTESTS
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sta .checkdata+1
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sta .checkdata+1
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;; First checkdata byte is for Cxxx tests.
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;; First checkdata byte is for Cxxx tests.
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jsr .nextcheck
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jsr NEXTCHECK
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bmi +
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bmi +
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jsr .checkCxxx
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jsr .checkCxxx
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@ -214,11 +214,11 @@ AUXMEMTESTS
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jsr RESETALL
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jsr RESETALL
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stx .checkdata
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stx .checkdata
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sty .checkdata+1
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sty .checkdata+1
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;; Do the next part twice.
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;; Do the next part twice.
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lda #1
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lda #1
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sta .ismain
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sta .ismain
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jsr .nextcheck
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jsr NEXTCHECK
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.checkloop ; Loop twice here: once for main, once for aux.
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.checkloop ; Loop twice here: once for main, once for aux.
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lda #4
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lda #4
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sta .region
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sta .region
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@ -241,7 +241,7 @@ AUXMEMTESTS
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beq .memlp
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beq .memlp
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.memlpinc
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.memlpinc
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jsr .nextcheck
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jsr NEXTCHECK
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dec .region ; loop four times: zero, main, text, hires
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dec .region ; loop four times: zero, main, text, hires
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bne .memlp
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bne .memlp
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@ -257,7 +257,7 @@ AUXMEMTESTS
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sty .checkdata+1
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sty .checkdata+1
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sta .ismain
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sta .ismain
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jmp .checkloop
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jmp .checkloop
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.checkdone
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.checkdone
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;; Jump PCL,PCH to next test, and loop.
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;; Jump PCL,PCH to next test, and loop.
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ldx .checkdata
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ldx .checkdata
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@ -285,7 +285,7 @@ AUXMEMTESTS
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;; X = index of memory location
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;; X = index of memory location
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;; A = actual
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;; A = actual
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;; Y = desired | (high bit set if main, unset=aux)
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;; Y = desired | (high bit set if main, unset=aux)
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jsr RESETALL
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jsr RESETALL
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sta .actual
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sta .actual
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@ -330,10 +330,10 @@ AUXMEMTESTS
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+prerr $000A ;; E000A: This is a data-driven test of main and auxiliary memory softswitch operation. We initialize $FF, $100, $200, $3FF, $427, $7FF, $800, $1FFF, $2000, $3FFF, $4000, $5FFF, and $BFFF in main RAM to value 1, and in auxiliary RAM to value 3. Then, we perform a testdata-driven sequence of instructions. Finally we (try to) increment all test locations. Then we test the expected values of the test locations in main and auxiliary memory. For more information on the operation of the auxiliary memory soft-switches, see Understanding the Apple IIe, by James Fielding Sather, Pg 5-22 to 5-28.
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+prerr $000A ;; E000A: This is a data-driven test of main and auxiliary memory softswitch operation. We initialize $FF, $100, $200, $3FF, $427, $7FF, $800, $1FFF, $2000, $3FFF, $4000, $5FFF, and $BFFF in main RAM to value 1, and in auxiliary RAM to value 3. Then, we perform a testdata-driven sequence of instructions. Finally we (try to) increment all test locations. Then we test the expected values of the test locations in main and auxiliary memory. For more information on the operation of the auxiliary memory soft-switches, see Understanding the Apple IIe, by James Fielding Sather, Pg 5-22 to 5-28.
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!text "FOLLOWED BY INC OF TEST LOCATIONS. SEE"
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!text "FOLLOWED BY INC OF TEST LOCATIONS. SEE"
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+prerred
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+prerred
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sec
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sec
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rts
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rts
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;;; Check that the expected ROM areas are visible.
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;;; Check that the expected ROM areas are visible.
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.checkCxxx
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.checkCxxx
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.gotCxxx = tmp0
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.gotCxxx = tmp0
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@ -367,7 +367,7 @@ AUXMEMTESTS
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+printed
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+printed
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lda .gotCxxx
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lda .gotCxxx
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jsr .printCxxxBits
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jsr .printCxxxBits
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+prerr $000B ;; E000B: This is a the Cxxx-ROM check part of the auxiliary memory data-driven test (see E000A for a description of the other part). After a full reset, we perform a testdata-driven sequence of instructions. Finally we check which parts of Cxxx ROM seem to be visible. We check C100-C2FF, C300-C3FF, C400-C7FF (which should be the same as C100-C2FF), and C800-CFFE. For more details, see Understanding the Apple IIe, by James Fielding Sather, Pg 5-28.
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+prerr $000B ;; E000B: This is a the Cxxx-ROM check part of the auxiliary memory data-driven test (see E000A for a description of the other part). After a full reset, we perform a testdata-driven sequence of instructions. Finally we check which parts of Cxxx ROM seem to be visible. We check C100-C2FF, C300-C3FF, C400-C7FF (which should be the same as C100-C2FF), and C800-CFFE. For more details, see Understanding the Apple IIe, by James Fielding Sather, Pg 5-28.
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!text "CXXX ROM TEST FAILED"
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!text "CXXX ROM TEST FAILED"
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+prerred
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+prerred
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@ -377,7 +377,7 @@ AUXMEMTESTS
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pla
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pla
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sec
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sec
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rts
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rts
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.checkCxxxDone
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.checkCxxxDone
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rts
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rts
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@ -462,47 +462,14 @@ AUXMEMTESTS
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!text "ROM",$8D
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!text "ROM",$8D
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+printed
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+printed
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rts
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rts
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;;; Increment .checkdata pointer to the next memory location, and load
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;;; it into the accumulator. X and Y are preserved.
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.nextcheck
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inc .checkdata
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bne +
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inc .checkdata+1
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+ sty SCRATCH
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ldy #0
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lda (.checkdata),y
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ldy SCRATCH
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ora #0
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rts
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;;; Print out the sequence of instructions at PCL,PCH, until we hit a JSR.
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;;; Print out the sequence of instructions at PCL,PCH, until we hit a JSR.
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.printtest
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.printtest
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+print
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+print
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!text "AFTER SEQUENCE",$8D
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!text "AFTER SEQUENCE",$8D
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+printed
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+printed
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-
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jmp PRINTTEST
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ldy #0
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lda (PCL),y
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cmp #$20
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beq +++
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lda #'-'
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jsr COUT
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lda #' '
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jsr COUT
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ldx #0
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lda (PCL,x)
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jsr $f88e
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ldx #3
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jsr $f8ea
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jsr $f953
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sta PCL
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sty PCH
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lda #$8D
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jsr COUT
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jmp -
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+++ rts
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;;; Copy zero page to aux mem. Assumes zp pointing at main mem, and leaves it that way.
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;;; Copy zero page to aux mem. Assumes zp pointing at main mem, and leaves it that way.
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zptoaux
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zptoaux
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ldx #0
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ldx #0
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@ -529,7 +496,7 @@ zpfromaux
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.auxtests
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.auxtests
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;; Our four basic tests --------------------------------------
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;; Our four basic tests --------------------------------------
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;; Test 1: everything reset.
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;; Test 1: everything reset.
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lda #1
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lda #1
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jsr .check
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jsr .check
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@ -546,7 +513,7 @@ zpfromaux
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sta SET_RAMRD
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sta SET_RAMRD
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jsr .check
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jsr .check
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!byte .C_skip, 2, 4, 4, 4, 3, 3, 3, 3
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!byte .C_skip, 2, 4, 4, 4, 3, 3, 3, 3
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;; Test 4: write to AUX, read from AUX, everything else normal.
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;; Test 4: write to AUX, read from AUX, everything else normal.
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lda #4
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lda #4
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sta SET_RAMRD
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sta SET_RAMRD
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@ -556,7 +523,7 @@ zpfromaux
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;; Our four basic tests, but with 80STORE ON -----------------
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;; Our four basic tests, but with 80STORE ON -----------------
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;; (400-7ff is pointing at main mem)
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;; (400-7ff is pointing at main mem)
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;; Test 5: everything reset.
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;; Test 5: everything reset.
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lda #5
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lda #5
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sta SET_80STORE
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sta SET_80STORE
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@ -576,7 +543,7 @@ zpfromaux
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sta SET_80STORE
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sta SET_80STORE
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jsr .check
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jsr .check
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!byte .C_skip, 2, 4, 2, 4, 3, 3, 3, 3
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!byte .C_skip, 2, 4, 2, 4, 3, 3, 3, 3
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;; Test 8: read and write aux
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;; Test 8: read and write aux
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lda #8
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lda #8
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sta SET_RAMRD
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sta SET_RAMRD
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@ -587,7 +554,7 @@ zpfromaux
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;; Our four basic tests, but with 80STORE and PAGE2 ON -------
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;; Our four basic tests, but with 80STORE and PAGE2 ON -------
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;; (400-7ff is pointing at aux mem)
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;; (400-7ff is pointing at aux mem)
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;; Test 9: everything reset.
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;; Test 9: everything reset.
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lda #9
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lda #9
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sta SET_80STORE
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sta SET_80STORE
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@ -610,7 +577,7 @@ zpfromaux
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sta SET_PAGE2
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sta SET_PAGE2
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jsr .check
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jsr .check
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!byte .C_skip, 2, 4, 1, 4, 3, 3, 4, 3
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!byte .C_skip, 2, 4, 1, 4, 3, 3, 4, 3
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;; Test C: read and write aux
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;; Test C: read and write aux
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lda #$c
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lda #$c
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sta SET_RAMRD
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sta SET_RAMRD
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@ -622,7 +589,7 @@ zpfromaux
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;; Our four basic tests, but with 80STORE and HIRES ON -------
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;; Our four basic tests, but with 80STORE and HIRES ON -------
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;; (400-7ff and 2000-3fff are pointing at main mem)
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;; (400-7ff and 2000-3fff are pointing at main mem)
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;; Test D: everything reset.
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;; Test D: everything reset.
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lda #$d
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lda #$d
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sta SET_80STORE
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sta SET_80STORE
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@ -645,7 +612,7 @@ zpfromaux
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sta SET_HIRES
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sta SET_HIRES
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jsr .check
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jsr .check
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!byte .C_skip, 2, 4, 2, 2, 3, 3, 3, 3
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!byte .C_skip, 2, 4, 2, 2, 3, 3, 3, 3
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;; Test 10: read and write aux
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;; Test 10: read and write aux
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lda #$10
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lda #$10
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sta SET_RAMRD
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sta SET_RAMRD
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@ -683,7 +650,7 @@ zpfromaux
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sta SET_PAGE2
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sta SET_PAGE2
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jsr .check
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jsr .check
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!byte .C_skip, 2, 4, 1, 1, 3, 3, 4, 4
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!byte .C_skip, 2, 4, 1, 1, 3, 3, 4, 4
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;; Test 14: read and write aux
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;; Test 14: read and write aux
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lda #$14
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lda #$14
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sta SET_RAMRD
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sta SET_RAMRD
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@ -1,7 +1,9 @@
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;;; Apple II Language Card audit routines
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;;; Apple II Language Card audit routines
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;;; Copyright © 2016 Zellyn Hunter <zellyn@gmail.com>
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;;; Copyright © 2016 Zellyn Hunter <zellyn@gmail.com>
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!zone langcard {
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!zone langcard {
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.checkdata = tmp1
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LANGCARDTESTS
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LANGCARDTESTS
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lda #0
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lda #0
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sta LCRESULT
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sta LCRESULT
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@ -61,20 +63,25 @@ LANGCARDTESTS_NO_CHECK:
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+ lda $C081 ; Read ROM with single access (only one needed to bank out)
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+ lda $C081 ; Read ROM with single access (only one needed to bank out)
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lda #$53
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lda #$53
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cmp $D17B
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cmp $D17B
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beq .dotest
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beq .datadriventests
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+prerr $000E ;; E000E: We tried to put the language card into read ROM, but failed to read.
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+prerr $000E ;; E000E: We tried to put the language card into read ROM, but failed to read.
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!text "CANNOT READ FROM ROM"
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!text "CANNOT READ FROM ROM"
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+prerred
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+prerred
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sec
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sec
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rts
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rts
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;; Parameterized tests
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;;; Main data-driven test. PCL,PCH holds the address of the next
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;;; data-driven test routine. We expect the various softswitches
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.dotest lda #<.tests
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;;; to be reset each time we loop at .ddloop.
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sta 0
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.datadriventests
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lda #<.tests
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sta PCL
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lda #>.tests
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lda #>.tests
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sta 1
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sta PCH
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.outer
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;;; Main data-drive-test loop.
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.ddloop
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ldy #0
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;; Initialize to known state:
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;; Initialize to known state:
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;; - $11 in $D17B bank 1 (ROM: $53)
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;; - $11 in $D17B bank 1 (ROM: $53)
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;; - $22 in $D17B bank 2 (ROM: $53)
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;; - $22 in $D17B bank 2 (ROM: $53)
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@ -91,32 +98,25 @@ LANGCARDTESTS_NO_CHECK:
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sta $D17B
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sta $D17B
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lda $C080
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lda $C080
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ldy #0
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jmp (PCL) ; Jump to test routine
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.inner
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lda ($0),y
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cmp #$ff
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beq .test
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tax
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bmi +
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ora #$80
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sta .lda+1
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.lda lda $C000
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jmp ++
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+ sta .sta+1
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.sta sta $C000
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++ iny
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bne .inner
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.test ;; ... test the triple
|
;; Test routine will JSR back to here, so the check data address is on the stack.
|
||||||
|
|
||||||
|
.test ;; ... test the quintiple of test values
|
||||||
inc $D17B
|
inc $D17B
|
||||||
inc $FE1F
|
inc $FE1F
|
||||||
iny
|
|
||||||
|
|
||||||
;; y now points to d17b-current,fe1f-current,bank1,bank2,fe1f-ram test quintiple
|
;; pull address off of stack: it points just below check data for this test.
|
||||||
|
pla
|
||||||
|
sta .checkdata
|
||||||
|
pla
|
||||||
|
sta .checkdata+1
|
||||||
|
|
||||||
|
;; .checkdata now points to d17b-current,fe1f-current,bank1,bank2,fe1f-ram test quintiple
|
||||||
|
|
||||||
;; Test current $D17B
|
;; Test current $D17B
|
||||||
lda (0),y
|
jsr NEXTCHECK
|
||||||
cmp $D17B
|
cmp $D17B
|
||||||
beq +
|
beq +
|
||||||
lda $D17B
|
lda $D17B
|
||||||
|
@ -125,7 +125,7 @@ LANGCARDTESTS_NO_CHECK:
|
||||||
+print
|
+print
|
||||||
!text "$D17B TO CONTAIN $"
|
!text "$D17B TO CONTAIN $"
|
||||||
+printed
|
+printed
|
||||||
lda (0),y
|
jsr CURCHECK
|
||||||
jsr PRBYTE
|
jsr PRBYTE
|
||||||
+print
|
+print
|
||||||
!text ", GOT $"
|
!text ", GOT $"
|
||||||
|
@ -136,9 +136,8 @@ LANGCARDTESTS_NO_CHECK:
|
||||||
jsr COUT
|
jsr COUT
|
||||||
jmp .datatesturl
|
jmp .datatesturl
|
||||||
|
|
||||||
+ iny
|
+ ;; Test current $FE1F
|
||||||
;; Test current $FE1F
|
jsr NEXTCHECK
|
||||||
lda (0),y
|
|
||||||
cmp $FE1F
|
cmp $FE1F
|
||||||
beq +
|
beq +
|
||||||
lda $FE1F
|
lda $FE1F
|
||||||
|
@ -147,7 +146,7 @@ LANGCARDTESTS_NO_CHECK:
|
||||||
+print
|
+print
|
||||||
!text "$FE1F=$"
|
!text "$FE1F=$"
|
||||||
+printed
|
+printed
|
||||||
lda (0),y
|
jsr CURCHECK
|
||||||
jsr PRBYTE
|
jsr PRBYTE
|
||||||
+print
|
+print
|
||||||
!text ", GOT $"
|
!text ", GOT $"
|
||||||
|
@ -158,11 +157,9 @@ LANGCARDTESTS_NO_CHECK:
|
||||||
jsr COUT
|
jsr COUT
|
||||||
jmp .datatesturl
|
jmp .datatesturl
|
||||||
|
|
||||||
+ iny
|
+ ;; Test bank 1 $D17B
|
||||||
|
|
||||||
;; Test bank 1 $D17B
|
|
||||||
lda $C088
|
lda $C088
|
||||||
lda (0),y
|
jsr NEXTCHECK
|
||||||
cmp $D17B
|
cmp $D17B
|
||||||
beq +
|
beq +
|
||||||
lda $D17B
|
lda $D17B
|
||||||
|
@ -171,7 +168,7 @@ LANGCARDTESTS_NO_CHECK:
|
||||||
+print
|
+print
|
||||||
!text "$D17B IN RAM BANK 1 TO CONTAIN $"
|
!text "$D17B IN RAM BANK 1 TO CONTAIN $"
|
||||||
+printed
|
+printed
|
||||||
lda (0),y
|
jsr CURCHECK
|
||||||
jsr PRBYTE
|
jsr PRBYTE
|
||||||
+print
|
+print
|
||||||
!text ", GOT $"
|
!text ", GOT $"
|
||||||
|
@ -182,11 +179,9 @@ LANGCARDTESTS_NO_CHECK:
|
||||||
jsr COUT
|
jsr COUT
|
||||||
jmp .datatesturl
|
jmp .datatesturl
|
||||||
|
|
||||||
+ iny
|
+ ;; Test bank 2 $D17B
|
||||||
|
|
||||||
;; Test bank 2 $D17B
|
|
||||||
lda $C080
|
lda $C080
|
||||||
lda (0),y
|
jsr NEXTCHECK
|
||||||
cmp $D17B
|
cmp $D17B
|
||||||
beq +
|
beq +
|
||||||
lda $D17B
|
lda $D17B
|
||||||
|
@ -195,7 +190,7 @@ LANGCARDTESTS_NO_CHECK:
|
||||||
+print
|
+print
|
||||||
!text "$D17B IN RAM BANK 2 TO CONTAIN $"
|
!text "$D17B IN RAM BANK 2 TO CONTAIN $"
|
||||||
+printed
|
+printed
|
||||||
lda (0),y
|
jsr CURCHECK
|
||||||
jsr PRBYTE
|
jsr PRBYTE
|
||||||
+print
|
+print
|
||||||
!text ", GOT $"
|
!text ", GOT $"
|
||||||
|
@ -206,11 +201,9 @@ LANGCARDTESTS_NO_CHECK:
|
||||||
jsr COUT
|
jsr COUT
|
||||||
jmp .datatesturl
|
jmp .datatesturl
|
||||||
|
|
||||||
+ iny
|
+ ;; Test RAM $FE1F
|
||||||
|
|
||||||
;; Test RAM $FE1F
|
|
||||||
lda $C080
|
lda $C080
|
||||||
lda (0),y
|
jsr NEXTCHECK
|
||||||
cmp $FE1F
|
cmp $FE1F
|
||||||
beq +
|
beq +
|
||||||
lda $FE1F
|
lda $FE1F
|
||||||
|
@ -219,7 +212,7 @@ LANGCARDTESTS_NO_CHECK:
|
||||||
+print
|
+print
|
||||||
!text "RAM $FE1F=$"
|
!text "RAM $FE1F=$"
|
||||||
+printed
|
+printed
|
||||||
lda (0),y
|
jsr CURCHECK
|
||||||
jsr PRBYTE
|
jsr PRBYTE
|
||||||
+print
|
+print
|
||||||
!text ", GOT $"
|
!text ", GOT $"
|
||||||
|
@ -230,19 +223,15 @@ LANGCARDTESTS_NO_CHECK:
|
||||||
jsr COUT
|
jsr COUT
|
||||||
jmp .datatesturl
|
jmp .datatesturl
|
||||||
|
|
||||||
+ iny
|
+ ;; Jump PCL,PCH up to after the test data, and loop.
|
||||||
|
jsr NEXTCHECK
|
||||||
lda ($0),y ; Done with the parameterized tests?
|
|
||||||
cmp #$ff
|
|
||||||
bne +
|
bne +
|
||||||
jmp .over
|
jmp .success
|
||||||
+ clc
|
+ ldx .checkdata
|
||||||
tya
|
ldy .checkdata+1
|
||||||
adc $0
|
stx PCL
|
||||||
sta $0
|
sty PCH
|
||||||
bcc +
|
jmp .ddloop
|
||||||
inc $1
|
|
||||||
+ jmp .outer
|
|
||||||
|
|
||||||
.datatesturl
|
.datatesturl
|
||||||
+prerr $0007 ;; E0007: This is a data-driven test of Language Card operation. We initialize $D17B in RAM bank 1 to $11, $D17B in RAM bank 2 to $22, and $FE1F in RAM to $33. Then, we perform a testdata-driven sequence of LDA and STA to the $C08X range. Finally we (try to) increment $D17B and $FE1F. Then we test (a) the current live value in $D17B, (b) the current live value in $FE1F, (c) the RAM bank 1 value of $D17B, (d) the RAM bank 2 value of $D17B, and (e) the RAM value of $FE1F, to see whether they match expected values. $D17B is usually $53 in ROM, and $FE1F is usally $60. For more information on the operation of the language card soft-switches, see Understanding the Apple IIe, by James Fielding Sather, Pg 5-24.
|
+prerr $0007 ;; E0007: This is a data-driven test of Language Card operation. We initialize $D17B in RAM bank 1 to $11, $D17B in RAM bank 2 to $22, and $FE1F in RAM to $33. Then, we perform a testdata-driven sequence of LDA and STA to the $C08X range. Finally we (try to) increment $D17B and $FE1F. Then we test (a) the current live value in $D17B, (b) the current live value in $FE1F, (c) the RAM bank 1 value of $D17B, (d) the RAM bank 2 value of $D17B, and (e) the RAM value of $FE1F, to see whether they match expected values. $D17B is usually $53 in ROM, and $FE1F is usally $60. For more information on the operation of the language card soft-switches, see Understanding the Apple IIe, by James Fielding Sather, Pg 5-24.
|
||||||
|
@ -252,79 +241,90 @@ LANGCARDTESTS_NO_CHECK:
|
||||||
rts
|
rts
|
||||||
|
|
||||||
.printseq
|
.printseq
|
||||||
tya
|
|
||||||
pha
|
|
||||||
+print
|
+print
|
||||||
!text "AFTER SEQUENCE OF:",$8D,"LDA $C080",$8D
|
!text "AFTER SEQUENCE OF:",$8D,"- LDA $C080",$8D
|
||||||
+printed
|
+printed
|
||||||
ldy #$0
|
jsr PRINTTEST
|
||||||
- lda ($0),y
|
|
||||||
cmp #$ff
|
|
||||||
beq +++
|
|
||||||
tax
|
|
||||||
bmi +
|
|
||||||
lda #'L'
|
|
||||||
jsr COUT
|
|
||||||
lda #'D'
|
|
||||||
bne ++
|
|
||||||
+ lda #'S'
|
|
||||||
jsr COUT
|
|
||||||
lda #'T'
|
|
||||||
++ jsr COUT
|
|
||||||
+print
|
+print
|
||||||
!text "A $C0"
|
!text "- INC $D17B",$8D,"- INC $FE1F",$8D,"EXPECTED "
|
||||||
+printed
|
+printed
|
||||||
txa
|
|
||||||
ora #$80
|
|
||||||
jsr PRBYTE
|
|
||||||
lda #$8D
|
|
||||||
jsr COUT
|
|
||||||
iny
|
|
||||||
bne -
|
|
||||||
+++
|
|
||||||
+print
|
|
||||||
!text "INC $D17B",$8D,"INC $FE1F",$8D,"EXPECTED "
|
|
||||||
+printed
|
|
||||||
pla
|
|
||||||
tay
|
|
||||||
rts
|
rts
|
||||||
|
|
||||||
.tests
|
.tests
|
||||||
;; Format:
|
;; Format:
|
||||||
;; - $ff-terminated list of C0XX addresses (0-F to read C08X, 80-8F to write C0XX).
|
;; Sequence of test instructions, finishing with `jsr .test`.
|
||||||
;; - quint: expected current $d17b and fe1f, then d17b in bank1, d17b in bank 2, and fe1f
|
;; - quint: expected current $d17b and fe1f, then d17b in bank1, d17b in bank 2, and fe1f
|
||||||
;; (All sequences start with lda $C080, just to reset things to a known state.)
|
;; (All sequences start with lda $C080, just to reset things to a known state.)
|
||||||
!byte $08, $ff ; Read $C088 (RAM read, write protected)
|
;; 0-byte to terminate tests.
|
||||||
|
|
||||||
|
lda $C088 ; Read $C088 (RAM read, write protected)
|
||||||
|
jsr .test ;
|
||||||
!byte $11, $33, $11, $22, $33 ;
|
!byte $11, $33, $11, $22, $33 ;
|
||||||
!byte $00, $ff ; Read $C080 (read bank 2, write disabled)
|
;
|
||||||
|
lda $C080 ; Read $C080 (read bank 2, write disabled)
|
||||||
|
jsr .test ;
|
||||||
!byte $22, $33, $11, $22, $33 ;
|
!byte $22, $33, $11, $22, $33 ;
|
||||||
!byte $01, $ff ; Read $C081 (ROM read, write disabled)
|
;
|
||||||
|
lda $C081 ; Read $C081 (ROM read, write disabled)
|
||||||
|
jsr .test ;
|
||||||
!byte $53, $60, $11, $22, $33 ;
|
!byte $53, $60, $11, $22, $33 ;
|
||||||
!byte $01, $09, $ff ; Read $C081, $C089 (ROM read, bank 1 write)
|
;
|
||||||
|
lda $C081 ; Read $C081, $C089 (ROM read, bank 1 write)
|
||||||
|
lda $C089 ;
|
||||||
|
jsr .test ;
|
||||||
!byte $53, $60, $54, $22, $61 ;
|
!byte $53, $60, $54, $22, $61 ;
|
||||||
!byte $01, $01, $ff ; Read $C081, $C081 (read ROM, write RAM bank 2)
|
;
|
||||||
|
lda $C081 ; Read $C081, $C081 (read ROM, write RAM bank 2)
|
||||||
|
lda $C081 ;
|
||||||
|
jsr .test ;
|
||||||
!byte $53, $60, $11, $54, $61 ;
|
!byte $53, $60, $11, $54, $61 ;
|
||||||
!byte $01, $01, $81, $ff ; Read $C081, $C081, write $C081 (read ROM, write RAM bank bank 2)
|
;
|
||||||
|
lda $C081 ; Read $C081, $C081, write $C081 (read ROM, write RAM bank bank 2)
|
||||||
|
lda $C081 ;
|
||||||
|
sta $C081 ;
|
||||||
|
jsr .test ;
|
||||||
!byte $53, $60, $11, $54, $61 ; See https://github.com/zellyn/a2audit/issues/3
|
!byte $53, $60, $11, $54, $61 ; See https://github.com/zellyn/a2audit/issues/3
|
||||||
!byte $0b, $ff ; Read $C08B (read RAM bank 1, no write)
|
;
|
||||||
|
lda $C08B ; Read $C08B (read RAM bank 1, no write)
|
||||||
|
jsr .test ;
|
||||||
!byte $11, $33, $11, $22, $33 ;
|
!byte $11, $33, $11, $22, $33 ;
|
||||||
!byte $03, $ff ; Read $C083 (read RAM bank 2, no write)
|
;
|
||||||
|
lda $C083 ; Read $C083 (read RAM bank 2, no write)
|
||||||
|
jsr .test ;
|
||||||
!byte $22, $33, $11, $22, $33 ;
|
!byte $22, $33, $11, $22, $33 ;
|
||||||
!byte $0b, $0b, $ff ; Read $C08B, $C08B (read/write RAM bank 1)
|
;
|
||||||
|
lda $C08B ; Read $C08B, $C08B (read/write RAM bank 1)
|
||||||
|
lda $C08B ;
|
||||||
|
jsr .test ;
|
||||||
!byte $12, $34, $12, $22, $34 ;
|
!byte $12, $34, $12, $22, $34 ;
|
||||||
!byte $0f, $07, $ff ; Read $C08F, $C087 (read/write RAM bank 2)
|
;
|
||||||
|
lda $C08F ; Read $C08F, $C087 (read/write RAM bank 2)
|
||||||
|
lda $C087 ;
|
||||||
|
jsr .test ;
|
||||||
!byte $23, $34, $11, $23, $34 ;
|
!byte $23, $34, $11, $23, $34 ;
|
||||||
!byte $07, $0D, $ff ; Read $C087, read $C08D (read ROM, write bank 1)
|
;
|
||||||
|
lda $C087 ; Read $C087, read $C08D (read ROM, write bank 1)
|
||||||
|
lda $C08D ;
|
||||||
|
jsr .test ;
|
||||||
!byte $53, $60, $54, $22, $61 ;
|
!byte $53, $60, $54, $22, $61 ;
|
||||||
!byte $0b, $8b, $0b, $ff ; Read $C08B, write $C08B, read $C08B (read RAM bank 1, no write)
|
;
|
||||||
!byte $11, $33, $11, $22, $33 ; (this one is tricky: reset WRTCOUNT by writing halfway)
|
lda $C08B ; Read $C08B, write $C08B, read $C08B (read RAM bank 1, no write)
|
||||||
!byte $8b, $8b, $0b, $ff ; Write $C08B, write $C08B (read RAM bank 1, no write)
|
sta $C08B ; (this one is tricky: reset WRTCOUNT by writing halfway)
|
||||||
|
lda $C08B ;
|
||||||
|
jsr .test ;
|
||||||
!byte $11, $33, $11, $22, $33 ;
|
!byte $11, $33, $11, $22, $33 ;
|
||||||
!byte $ff
|
;
|
||||||
|
sta $C08B ; Write $C08B, write $C08B, read $C08B (read RAM bank 1, no write)
|
||||||
|
sta $C08B ;
|
||||||
|
lda $C08B ;
|
||||||
|
jsr .test ;
|
||||||
|
!byte $11, $33, $11, $22, $33 ;
|
||||||
|
;
|
||||||
|
!byte 0
|
||||||
|
|
||||||
nop ; Provide clean break after data when viewing disassembly
|
nop ; Provide clean break after data when viewing disassembly
|
||||||
nop
|
nop
|
||||||
.over
|
.success
|
||||||
|
|
||||||
;; Success
|
;; Success
|
||||||
+print
|
+print
|
||||||
|
|
45
audit/printtest.asm
Normal file
45
audit/printtest.asm
Normal file
|
@ -0,0 +1,45 @@
|
||||||
|
;;; Helper routines for printing out sequences of test code.
|
||||||
|
;;; Copyright © 2017 Zellyn Hunter <zellyn@gmail.com>
|
||||||
|
|
||||||
|
|
||||||
|
!zone printtest {
|
||||||
|
.checkdata = tmp1
|
||||||
|
|
||||||
|
PRINTTEST
|
||||||
|
-
|
||||||
|
ldy #0
|
||||||
|
lda (PCL),y
|
||||||
|
cmp #$20
|
||||||
|
beq +++
|
||||||
|
lda #'-'
|
||||||
|
jsr COUT
|
||||||
|
lda #' '
|
||||||
|
jsr COUT
|
||||||
|
ldx #0
|
||||||
|
lda (PCL,x)
|
||||||
|
jsr $f88e
|
||||||
|
ldx #3
|
||||||
|
jsr $f8ea
|
||||||
|
jsr $f953
|
||||||
|
sta PCL
|
||||||
|
sty PCH
|
||||||
|
lda #$8D
|
||||||
|
jsr COUT
|
||||||
|
jmp -
|
||||||
|
+++ rts
|
||||||
|
|
||||||
|
;;; Increment .checkdata pointer to the next memory location, and load
|
||||||
|
;;; it into the accumulator. X and Y are preserved.
|
||||||
|
NEXTCHECK
|
||||||
|
inc .checkdata
|
||||||
|
bne CURCHECK
|
||||||
|
inc .checkdata+1
|
||||||
|
CURCHECK
|
||||||
|
sty SCRATCH
|
||||||
|
ldy #0
|
||||||
|
lda (.checkdata),y
|
||||||
|
ldy SCRATCH
|
||||||
|
ora #0
|
||||||
|
rts
|
||||||
|
|
||||||
|
} ;printtest
|
Loading…
Reference in New Issue
Block a user