Fifth
edition: a few fixes (keyboard table, microdisc in single-density)
Fourth edition: quick and dirty HTML version
Third edition: updated Second VIA (Telestrat) chapter
Second edition: updated PSG and Disk interface chapters
Contents
The Oric computers are
powered by a 6502 processor running at 1 Mhz. All computers share a central
architecture ensuring strong compatibility : this is the Oric-1/Atmos
architecture consisting of the cpu, the system bus, a VIA (Versatile Interface
Adapter), an UAL (Universal Array Logic) and a PSG (Programmable Sound
Generator). I guess many of you know the 65xx processor series, so I won't describe
the cpu here. I would just like to point out the processor's NMI line is not
connected to anything on the Telestrat (the reset button is really connected to
the Reset line) and peripheral request lines may be wire-ANDed on the IRQ line
(the versatile interface adapter is the only one connected in the basic
configuration) . The UAL is responsible for clocking the cpu and the
peripherals as well as managing memory select signals and displaying the
screen. The memory select signals allow to disable the internal 16K rom, to
enable external IOs or overlay ram, etc. These signals are presented to the
system bus only with the basic configuration, so only extensions are able to
use them. The VIA is a 6522 one and it is central to the basic peripherals of
the Oric: its input-output lines are connected to the keyboard, to the PSG, to
the tape, to the printer port (connections are described in next sub-chapter).
It also provides 7 sources of interrupts, timers... The PSG is a General
Instruments AY-3-8912 (identical to Yamaha's 2910). The CMOS technology of the
PSG has obliged the Oric designers to a weird interfacing of the select lines
and data lines to the VIA.
The UAL (labelled HSC
10017) saves a lot of components : it builds clock signals, memory signals (so
it is a simple memory management unit), and last but not least: video signals.
Memory signals are generated when addresses are detected on the bus : the IO is
made active when page 3 is addressed and the internal Oric ROM is selected when
an address in the C000-FFFF range is accessed. So, all IOs in the basic
configuration are done through addresses in page 3. The VIA is always selected
with a page 3 address, so the 16 registers of the VIA are viewed 16 times in
page 3. For compatibility sake with more complete configurations (drives,
joystick, serial interfaces...), it is recommended to access VIA at 0300-030F.
Video is programmed by inserting control bytes in-line with screen data. As the
UAL refreshes the screen by reading the screen image in memory, internal
registers (background and foreground colors, blinking, charsets location...)
are updated when those control bytes are encountered (bits 5 and 6 are both 0).
See the Screen chapter for a detailed reference.
The 6522 has provision for
two eight-bits IO ports (A and B) plus control lines (CA1, CA2, CB1, CB2),
interfacing with the other components. Port A is used as a secondary bus :
PA0..PA7 lines connect both to the PSG data bus and to the printer port. PSG
selection is done thanks to CA2 and CB2 lines. Port B provides many connections
to the keyboard, tape, and printer port.
|
VIA
Lines |
Oric
usage |
|
PA0..PA7 |
PSG data bus, printer data lines |
|
CA1 |
printer
acknowledge line |
|
CA2 |
PSG
BC1 line |
|
PB0..PB2 |
keyboard
lines-demultiplexer |
|
PB3 |
keyboard
sense line |
|
PB4 |
printer
strobe line |
|
PB5 |
(not
connected) |
|
PB6 |
tape
connector motor control |
|
PB7 |
tape
connector output |
|
CB1 |
tape
connector input |
|
CB2 |
PSG
BDIR line |
Moreover, the 6522 also
features programmable timers, interrupt control and synchronous communication
capabilities (synchronous communication is not available in the Oric due to the
way the VIA is connected). See the 6522 brief reference in appendix. E.g timer
1 is used by the rom to provide an interrupt every 1/100th a second,
decrementing some system variables to allow for the WAIT command, to poll the
keyboard or wait a screen refresh. Programs may use both timers, and control
interrupts accordingly with the peripheral connections described above (e.g
tape reading requires detecting a edge transition on CB1).
The AY-3-8912 is a three
chanels sound generator allowing simple tones (square waves) and more complex
sound using an envelope generator. Moreover, each chanel may be mixed with a
noise generator output. On the Oric, the three outputs are wired together and
to the loudspeaker. Programming the PSG is rather slow and cumbersome on the
oric due to its interfacing to the VIA. As two select lines of the PSG (BC1 and
BDIR) are connected to the CA2 and CB2 lines of the VIA, you have to ensure the
PCR (Peripheral Control Register) of the 6522 is correctly set in order to
communicate with the PSG. As explained before, data to/from the PSG flows
through a secondary bus connected to port A of the VIA. Selecting the PSG means
asking it to read a register number (selecting one of its register), or
reading/writing the previously selected register. Here are the four
combinations:
|
BDIR |
BC1 |
|
|
0 |
0 |
PSG
not selected |
|
0 |
1 |
Read
PSG register |
|
1 |
0 |
Write
PSG register |
|
1 |
1 |
Index register of PSG selected |
Last but not least, note
that register 14 (0Eh) of the PSG is an IO port (other flavors of the PSG, 8910
and 8913, have 0 or 2 IO ports). On the Oric, this IO port is used to select a
column in the keyboard matrix, see the Keyboard chapter.
The keyboard of the Oric
computers is just a passive matrix. It is up to the cpu to poll the keyboard by
sensing each key in the matrix (so, 64 tests). This is a rather lenghty process
due to the way the columns are selected (through the IO port of the PSG). Sensing
a key means programming a line (0 to 7) in PB0..PB2 of the VIA, and selecting a
column in PSG's IO port (each line of the IO port is connected to a keyboard's
column with negative logic, so 11110111 will select column 3), then reading the
result in PB3 input (a 1 means the key is pressed). Here is the keyboard matrix
(note that the Oric-1 do not have a FCT key):
|
PB210 |
PA7 |
PA6 |
PA5 |
PA4 |
PA3 |
PA2 |
PA1 |
PA0 |
|
000 |
3 |
X |
1 |
(right Ctrl) |
V |
5 |
N |
7 |
|
001 |
D |
Q |
ESC |
|
F |
R |
T |
J |
|
010 |
C |
2 |
Z |
CTL |
4 |
B |
6 |
M |
|
011 |
' |
\ |
(<) |
|
- |
; |
9 |
K |
|
100 |
Right |
Down |
Left |
Left
Shift |
Up |
. |
, |
SPC |
|
101 |
[ |
] |
DEL |
FCT
(Alt) |
P |
O |
I |
U |
|
110 |
W |
S |
A |
(AltGr) |
E |
G |
H |
Y |
|
111 |
= |
(CAPS) |
RET |
Right
Shift |
/ |
0 |
L |
8 |
Please note that the Oric-1 keyboard only has 57 keys, and the Atmos
keyboard has 58. This means that eight locations in this matrix were not wired.
Euphoric implements additional keys in this matrix in order to better support
International keyboards (so, again, those keys in blue in the above table do
not exist on the real Oric keyboards).
The Centronics port on the
back of the Oric has only 20 pins (10 of them being ground). So there are only
2 control lines : Strobe and Acknowledge. Sending a byte to the printer
requires outputting the value through the VIA's port A, then emitting a Strobe
pulse (negative edge out to PB4, normal level of PB4 should be 1), and finally
waiting for the printer's acknowledge (negative edge received into CA1). As the
printer port is bidirectional, it may be used for inputting values too, this is
the case when connecting joysticks to a PASE interface on the parallel port.
Programming bits 6 and 7 as outputs and bits 0..5 as inputs allows to read the
joystick (note that if the PSG has to be written to, then whole port A has to
be programmed as output again): bit 7 allows to select left joystick, and bit 6
to select right joystick. Then bits 0, 1, 3, 4 and 5 are used to sense the
joysticks switches (respectively left, right, down, up and fire): a 0 means the
corresponding switch is activated.
The ULA displays 224 lines
of 240 pixels (pixels are not square, they have a 5/4 horizontal/vertical
ratio) in 8 colors (1 bit each for red, green, blue). However, specifying
background or foreground colors is achieved through in-line control bytes. They
are usually called serial attributes because their effect may persist until the
end of the line, or even after a complete screen refresh. Serial attributes
have both bits 5 and 6 resetted to 0, and allow to set the ULA functionning:
hardware blinking, character set selection, double height characters, foreground/background
color selection, text/hires mode. The screen image in memory starts either in
location A000 or BB80 depending of the current character/bitmap mode. The ULA
always starts displaying a line with foreground color being white, background color
being black, no blinking, normal height characters and normal character set. It
reads 40 bytes in memory to display a 240 pixels line, and serial attributes
are processed on the fly. As a byte cannot contains both pixel values and a
serial attribute, 6 pixels in the background color will be displayed when
encountering a serial attribute (serial attributes take effect immediately, so
a background color change will produce 6 pixels of the corresponding color).
When in hires mode, the 6 least significant bits in a byte provide 6 successive
pixels on screen (a 1 value means foreground color, a 0 means background
color). If both bits 6 and 5 in a byte are 0, then the 5 low-order bits are
taken as a serial attribute. Bit 7 (most significant bit) is an inversed video
flag, meaning that the pixels colors of the byte will be inversed (each
reg/green/blue bit is inversed), this does not affect successive bytes. When in
text mode, the same 40 bytes are repeatedly read to display 8 lines on screen.
The 7 low order bits give an ascii value in the 32..127 range (0..31 values are
serial attributes). This value and the current repetition (0 to 7) is used to
select a byte in one of the two character set definition tables, whose 6 low-
order bits will be interpreted as pixels. Once again, bit 7 is an inversed
video flag for the current byte.
|
Attributes |
X0000XXX:
foreground color |
X0001XXX:
text attributes |
X0010XXX:
background color |
X0011XXX:
video mode |
|
000 |
Black |
Standard |
Black |
Text
60 Hz |
|
001 |
Red |
Alternate
charset |
Red |
Text
60 Hz |
|
010 |
Green |
Double
height |
Green |
Text
50 Hz |
|
011 |
Yellow |
Double
height, alt charset |
Yellow |
Text
50 Hz |
|
100 |
Blue |
Blinking |
Blue |
Hires
60 Hz |
|
101 |
Magenta |
Blinking,
alt charset |
Magenta |
Hires
60 Hz |
|
110 |
Cyan |
Blinking,
dble height |
Cyan |
Hires
50 Hz |
|
111 |
White |
Blink, dble height, alt char |
White |
Hires
50 Hz |
Whatever the current mode
is (text or hires), after 200 lines are displayed, the ULA starts reading from
memory location BF68 (so there's a 32 bytes hole in hires mode's memory image),
and repeats reading 8 times each of the 3 following 40 bytes sequences (so
serial attributes switching to text or hires mode, in this area, will only
affect the location of character sets (B400-BBFF in text mode, and 9800-9FFF in
hires mode) and determine the next starting address of the screen image).
Mixing lines of text and lines of hires in the same screen is possible. The ULA
adjusts its memory read pointer, and its character sets pointers.
Drive interfaces for the
oric are all driven by the same family of FDC (floppy disc controllers):
Western Digital 177x for the Jasmin and new 179x generation for the Microdisc
(and Telestrat). Differences in this family exist to connect negative or
positive drives, and to allow double-density formats (MFM mode). The FDC 1773
of the Jasmin and the 1793 of the Microdisc are compatible, but the additional
circuitry is quite different so the programming routines have to be deeply
adapted from one to the other (the telestrat has a second ULA integrating the
Microdisc electronics, so it is largely compatible with it). The FDC 1793 (or
1773) is accessible through locations 0310-0313 in Microdisc's electronics, and
03F4-03F7 in Jasmin's electronics. This requires the interface to disable the
internal VIA, with the use of the I/O CONTROL line on the system bus. See
appendix for FDC programming commands. Microdisc's electronics features an
output buffer at location 0314 to select drive number, side number, and memory
signals. Also, two signals of the FDC are readable when reading locations 0314
and 0318. The big picture is that the DRQ line (Data Request) has to be polled
through bit 7 of location 0318 (a 0 means the FDC is ready to read/write a byte
of data), and the end of the command is signaled to the processor as the INTRQ
line (interrupt request) of the FDC is connected to the system IRQ line through
a NAND gate enabled by bit 0 of location 0314 (a 1 enables interrupts).
Alternatively, cpu interrupts may be disabled: in this case, the end of the
command can be polled from bit 7 of location 0314 which reflects the INTRQ
line, provided that the previous NAND gate is enabled. This is a more bug-proof
approach than polling the FDC status register, because reading the FDC status
resets the IRQ condition (reading location $0314 doesn't). Microdisc also
allows access to the overlay ram (internal ram of the Oric in locations
C000-FFFF usually masked by the rom), and to the 8 KB eprom of the interface.
This is achieved through bits 7 and 1 of location 0314. This is not implemented
in the Telestrat's second ULA as ram overlay has been generalized to 8 memory
banks (rom or ram), selected through bits 0..2 of its second VIA.
Write to location 0314 :
|
bit 7: Eprom select (active low) |
|
bit
65: drive select (0 to 3) |
|
bit
4: side select |
|
bit 3: double density enable (0: double density, 1:
single density) |
|
bit 2: along with bit 3, selects the data separator
clock
divisor (1:
double density, 0: single-density) |
|
bit 1: ROMDIS (active low). When 0, internal Basic
rom is disabled. |
|
bit 0: enable FDC INTRQ to appear on read location
$0314 and to drive cpu IRQ |
Read of location 0314 (only
bit 7 connected) :
|
bit 7: INTRQ state (only if bit 0 above has
been set to 1) in negative logic so it's 0 if FDC requests an Interrupt. |
Read of location 0318 (only
bit 7 connected)
|
bit 7: DRQ state (active low) |
Jasmin's electronics also
features buffers for side/drive selecting, and memory signals, but the DRQ line
is connected to the system IRQ line so it allows for interrupt-driven transfers
(however, two consecutives bytes are separated by 31.25 micro-seconds, so the
interrupt routine has to be fast ! As an example, FT-DOS uses a dedicated
interrupt routine, and does not even have time to save registers: the interrupt
routine lasts 28 cycles) The end of a command has to be detected by reading the
busy bit of the Status Register of the FDC.
location 03F8
|
bit
0: side select |
location 03F9 : disk
controller reset (writing any value will reset the FDC)
location 03FA
|
bit 0: overlay ram access (1 means overlay ram
enabled) |
location 03FB
|
bit 0: ROMDIS (1 means internal Basic rom
disabled) |
locations 03FC, 03FD, 03FE,
03FF : writing to one of these locations will select the corresponding drive
Writing to the tape is
simply a question of outputting a square waveform to bit 7 of VIA's B port. So,
timing is the essence... The standard system software of the Oric-1/Atmos (no
tape software in Telestrat) uses a mix of two frequencies : 2400 Hz and 1200
Hz. For example, in SLOW mode, to write a bit to the tape, the rom routines
output either 4 periods at 1200 Hz for a 0 or 8 periods at 2400 Hz for a 1 (so
the baud rate is 300). In FAST mode, the difference is much thinner : either a
2400 Hz period for a 1, or half a 2400 Hz period and half a 1200 Hz period for
a 0 (so the baud rate lies between 1600 and 2400 depending on the proportion of
1's and 0's). Whatever the mode is (SLOW or FAST), the rom writes one byte as
13 bits on tape: a starting 0, eight bits of data, a parity bit, and three 1
bits. Reading the tape requires measuring the time interval between edges on
the CB1 pin (with a VIA's timer of course). In theory, this operation could be
interrupt-driven, but I have never seen programs using this feature.
There's no standard serial
port on the Oric-1/Atmos but one is standard with the Telestrat and many
extensions exist for the Oric-1/Atmos. I have only heard about serial
interfaces driven by the 6551 ACIA (Asynchronous Communication Interface
Adapter). Four IO addresses allow to program the ACIA, they are located at 031C
on the Telestrat. As the Microdisc's electronics does not use these addresses,
it would be a good idea if all the serial extensions for Oric-1 or Atmos were
located there. See the ACIA brief reference in appendix for a summary of
commands (am I tired of writing this or what ?). Note that you need a IRQ
handler aware of the ACIA if you enable the ACIA interrupts, otherwise the
interrupt condition will not be resetted and the cpu will indefinitely service
an interrupt request.
Very few Oric owners have
this extension. It is most useful for people using their oric as a BBS, since
no Oric operating system stores time/date information of files. Moreover, the
alarm feature of the main chip is near useless as the extension's designers
didn't connect the interrupt request line (so you need to poll the alarm in
order to see if time has expired, it is not harder to check if the clock has
reached some given time/date). See appendix for reference.
The Telestrat has a second
VIA interfacing new hardware, and allowing the selection of the memory banks.
This VIA is located at address 0320. Pin assignment changed from the original
Stratos when crossing the chanel (from England to France): as some pins were
not connected, the french company decided that a Midi connector could be a nice
marketing argument, even with random VIA pins connected behind... Fortunately
better additions were done too: capability to use a mouse in right joystick
port, phone ring detection (a rather complex circuitry has been added for
it...).
So, here is the input/output ports assignment of the final Telestrat board,
with its small daughterboards add-ons:
|
VIA
lines |
Telestrat
usage |
|
PA0..PA2 |
Memory
bank selection |
|
PA3 |
Minitel
port pin 6 / "Midi" port pin 3 |
|
PA4 |
RS232/Minitel
selection |
|
PA5 |
Third mouse button (right joystick port pin 5) |
|
PA6 |
(Phone ring detection of the Stratos on modem port
pin 4 ?) / "Midi" port pin 5 |
|
PA7 |
Second mouse button (right joystick port pin 9) |
|
CA1 |
"Midi"
port pin 1 |
|
CA2 |
not
used ? |
|
PB0..PB4 |
Joystick
ports |
|
PB5 |
Select
dipswitch (missing) |
|
PB6 |
Select
Left Joystick port |
|
PB7 |
Select
Right Joystick port |
|
CB1 |
Phone
Ring detection |
|
CB2 |
"Midi"
port pin 4 |
Selecting a memory bank
(memory addresses in the C000-FFFF range) is easy, just write the bank number
you wish in the three low-order bits of port A. Bank 0 is the overlay ram,
banks 1 to 7 may be present due to cartridges inserted in one of the two
cartridge slots. Usually, bank 7 contains the TeleMon software, the Telestrat
boots on Bank 7 when powered on. Bank 0 is loaded with the StratSed operating
system when booting (the system is loaded from the disk in drive). Other banks
may contain either ram or rom, from the cartridges inserted.
PB5, PB6 and PB7 allow to
select one of three ports to read through PB0..PB4, two of which are joystick
ports (PB5 is connected to a missing IC, which was intended to interface to
dipswitches (these are absent too)). The switches of the joystick are readable
through PB0, PB1, PB2, PB3, PB4 (respectively right, left, fire, down, up).
When a switch is closed, a 0 is sensed in the corresponding bit (the pin is
connected to ground), otherwise the pin remains not connected in high-impedance
input, and a 1 is sensed. Alternatively, a mouse may be connected to the right
joystick port : right, left, fire (first mouse button), down, up work as with a
joystick (middle and right button are connected to PA7 and PA5).
PA3, PA6, CA1, CB2 are
connected to the "Midi" port. I prefer to call it "the fake
DIN" since there's no way to use it as a midi connector (IMHO).
PA4 selects which port
(RS232 or Minitel) is connected to the ACIA. A 0 selects the Minitel port (TTL
levels) and a 1 selects the RS232 port (standard EIA levels, but only the Tx,
Rx, -RTS, -CTS, -DCD and -DTR are connected (plus ground pin 7 of course): -DSR
is connected to +5V, as the MC1489 can only convert 3 inputs, but I would
prefer it grounded. Note also that the original Stratos had -Rx connected to
modem port pin 5, and this is converted to Rx with a NAND gate on a Telestrat
daughterboard.