From 889e22f5c35e9feba66fde35e09556a3396318ba Mon Sep 17 00:00:00 2001
From: Michaelangel007 <michaelangel007@sharedcraft.com>
Date: Thu, 26 Oct 2017 13:41:46 -0700
Subject: [PATCH] V22 fix aux/main order

---
 bin/dhgr.byte   | Bin 872 -> 872 bytes
 hgrbyte.dsk     | Bin 143360 -> 143360 bytes
 src/dhgr.byte.s |  10 +++++-----
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/bin/dhgr.byte b/bin/dhgr.byte
index d2fd342d950e61b07a65c23074a0191c808ced5f..9432a11e40f2796dee7e0f88581ca48273a7039e 100644
GIT binary patch
delta 26
icmaFC_JWORrPxL$MMh4JrT-<eHZUz<*sQ~7!vp|#mk1gF

delta 26
icmaFC_JWORrRYW`MMh4BrT-<eHZU#V*sQ~7!vp|#LkJlF

diff --git a/hgrbyte.dsk b/hgrbyte.dsk
index dc741b4932f182850cdf58a016b0c3539e373663..e27a8aa5eb08ea34040d730b7f54d56a603b1cbb 100644
GIT binary patch
delta 41
zcmV+^0M`G2;0S==2(YUP0a~-H3U~1d2&MlRYOn&J0Fx~I)d3cR0{yoF{Q>?mcu*1h

delta 41
zcmV+^0M`G2;0S==2(YUP0amlD3U~1d0HyyJYOn&J2$L-Q)d3ZQ0{yoF{Q>?mcZw1A

diff --git a/src/dhgr.byte.s b/src/dhgr.byte.s
index c5dd3ae..f4ea6b1 100644
--- a/src/dhgr.byte.s
+++ b/src/dhgr.byte.s
@@ -6,7 +6,7 @@ CONFIG_DHGR = 1
 ; https://github.com/Michaelangel007/apple2_hgrbyte/
 ;
 ; Michael Pohoreski
-; Version 21
+; Version 22
 ;
 ; TL:DR;
 ;   IJKL to move
@@ -29,7 +29,7 @@ CONFIG_DHGR = 1
 ;   L     Move cursor down
 ;
 ;   ^I    Move cursor to col 0
-;   ^J    Move cursor to col 39
+;   ^J    Move cursor to col 79
 ;   ^K    Move cursor to row 0
 ;   ^L    Move cursor to row 191
 ;   RET   Center cursor
@@ -149,7 +149,7 @@ __MAIN = $900
         ORG __MAIN
 
 DhgrByte
-        LDA #21             ; Version - copy HGR1 to aux, HGR2 to HGR1
+        LDA #22             ; Version - copy HGR1 to aux, HGR2 to HGR1
         JSR Init_Exit       ; FEATURE: Set to 00 if you don't want to copy AUX $2000 to MAIN $4000
 
         BIT PAGE1           ; Page 1
@@ -374,13 +374,13 @@ DrawStatus
         JSR COUT
 
     DO CONFIG_DHGR
-        LDY #0              ; src = &char[0][8]
+        LDY #8              ; src = &char[1][8]
         LDA cursor_col
         CLC
         ROR
         BCS HaveMainMem
 HaveAuxMem
-        LDY #8              ; src = &char[1][8]
+        LDY #0              ; src = &char[0][8]
 HaveMainMem
 
         LDX #0              ; dst = 0