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126 lines
3.5 KiB
Plaintext
126 lines
3.5 KiB
Plaintext
MockingBoard Mini-manual (Part 2): Sound Programming
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The user can set Tone Frequency (12 bits, 4 coarse & 8 fine)* and
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Amplitude (4 bits) for each channel individually. A fifth Amplitude bit
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lets
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you decide if a channel's Level will be "fixed" (use the Level value) or
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"variable" (i.e. follow the current Envelope pattern). You can set NG
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Frequency (4 bits)* but not level.
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*Tone Freq = A2 Clock Freq/ [ (4096 x Coarse) + (16 x Fine) ]
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Noise Freq = A2 Clock Freq/ (16 x NG value)
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The Envelope of the combined outputs of enabled sources can be
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controlled
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for Period (16 bits, 8 coarse & 8 fine)** and, roughly, for Shape (4
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bits).
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**Env Freq = A2 Clock Freq/ [ (65536 x Coarse) + (256 x Fine) ]
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The registers of the PSG are described briefly below:
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Reg. Function & Bit(s) used
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00 A Freq. fine (0-7)
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01 A Freq. coarse (0-3)
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02 B Freq. fine (0-7)
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03 B Freq. coarse (0-3)
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04 C Freq. fine (0-7)
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05 C Freq. coarse (0-3)
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06 NG Freq. (0-4)
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07 Enable =0/ Disable =1
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NG on A (5) on B (4) on C (3)
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Tone on A (2) on B (1) on C (0)
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Ex: Writing $F0 to Reg 07 plays tones A, B, C plus noise on C
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08 A Level (0-3) and
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Envelope Control (4): 1 = Use Env; 0 = Use Level value
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09 B Level (0-3) and ...
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0A C Level (0-3) and ...
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0B Envelope Period Fine (0-7)
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0C Envelope Period Coarse (0-7)
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0D Envelope Shape (four bits)
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Continue (3) 0= do 1 cycle and set Level to zero
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Attack (2) 1= count up 0= count down
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Alternate (1) 1= reverse count direction each cycle
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Hold (0) 1= do 1 cycle and hold count
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To program the MB you write to the board's 6522 I/O chip(s). All
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addresses reference here are for a MB Sound II (2 Output channels) in Slot
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4.
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$C400 ORB1 function to perform, OUT 1
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$C480 ORB2 function to perform, OUT 2
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$C401 ORA1 data, OUT 1
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$C481 ORA2 data, OUT 2
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$C402 DDRB1 data direction, OUT 1
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$C482 DDRB2 data direction, OUT 2
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$C403 DDRA1 data direction, OUT 1
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$C483 DDRA2 data direction, OUT 2
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Before sending music, etc. data to the MB you must Initialize the board's
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I/O. To Initialize the 6522's: Store $FF at $C402 and the other three
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DDRxx addresses. This needs to be done by your program just once.
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Your program gets access to a PSG via the 6522 by using a few basic
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Function codes which set the PSG's I/O control lines:
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Set Inactive = $04 Set PSG Reg# = $07 Write Data = $06 Reset = $00
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To Write to a PSG register: Tell the PSG which Register you wish to access
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(i.e. Set the "current register" #) and Write the data. This is easiest to
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do with subroutines to handle the basic Functions.
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Example Subroutines (for Output Channel 1):
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Set Reg # 1000: A9 07 8D 00 C4 A9 04 8D 00 C4 60
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Write Data 100B: A9 06 8D 00 C4 A9 04 8D 00 C4 60
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Notice that each Function sub ends by setting the PSG control lines to
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Inactive.
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Similarly, to do a Reset (set all PSG regs to zero) ...
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Reset 1016: A9 00 8D 00 C4 A9 04 8D 00 C4 60
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To put the value $55 in PSG Register 02 (Channel B Freq. fine) ....
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1080: A9 02 put Reg# in A
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1082: 8D 01 C4 store A at the Data address ORA1
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1085: 20 00 10 JSR to Set Reg# (sets "current register" to Register
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2)
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1088: A9 55 put the value $55 in A
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108A: 8D 01 C4 store A at the Data address ORA1
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108D: 20 0B 10 JSR to Write Data ($55 goes into PSG Register 2)
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1090: 60 Exit from subroutine
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Good luck!
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