contiki/cpu/cc2538/cc2538.lds

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/*
* Copyright (c) 2013, Texas Instruments Incorporated - http://www.ti.com/
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* cc2538 linker configuration file. This is not the actual file used at link
* stage. Rather, it is used as input for the auto-generation of the actual
* ld script, which is called cc2538.ld and will be in the project directory
*/
MEMORY
{
FLASH_FW (rx) : ORIGIN = FLASH_FW_ADDR, LENGTH = FLASH_FW_SIZE
FLASH_CCA (RX) : ORIGIN = FLASH_CCA_ADDR, LENGTH = FLASH_CCA_SIZE
/*
* If PM2 is enabled, then the PM2 SRAM limitations apply, i.e. the
* regular-leakage SRAM is a non-retention SRAM and the low-leakage SRAM is
* a full-retention SRAM.
* Else, the data in the regular-leakage SRAM is always retained, so there
* are virtually a non-retention SRAM with a size of 0 bytes and a
* full-retention SRAM spanning the whole SRAM, which is more convenient to
* use.
*/
#if LPM_CONF_ENABLE && LPM_CONF_MAX_PM >= 2
NRSRAM (RWX) : ORIGIN = CC2538_DEV_RLSRAM_ADDR,
LENGTH = CC2538_DEV_RLSRAM_SIZE
FRSRAM (RWX) : ORIGIN = CC2538_DEV_LLSRAM_ADDR,
LENGTH = CC2538_DEV_LLSRAM_SIZE
#else
NRSRAM (RWX) : ORIGIN = CC2538_DEV_RLSRAM_ADDR, LENGTH = 0
FRSRAM (RWX) : ORIGIN = CC2538_DEV_SRAM_ADDR, LENGTH = CC2538_DEV_SRAM_SIZE
#endif
}
ENTRY(flash_cca_lock_page)
SECTIONS
{
.text :
{
_text = .;
*(.vectors)
*(.text*)
*(.rodata*)
_etext = .;
} > FLASH_FW= 0
.socdata (NOLOAD) :
{
*(.udma_channel_control_table)
} > FRSRAM
cc2538: Word-align .data LMA In order to be fast, the reset_handler() function uses word accesses to initialize the .data output section. However, most toolchains do not automatically force the alignment of an output section LMA to use the maximum alignment of all its input sections. Because of that, assuming that .data contains some words, the LMA of the .data output section was not word-aligned in some cases, resulting in an initialization performed using slow unaligned word accesses. This commit forces the alignment of the LMA of the .data output section with a word boundary in order to always use fast aligned word accesses to read the .data load area. Note that this solution is better than using ALIGN_WITH_INPUT, both because the latter is a new feature incompatible with older toolchains, and because it could create a big gap between _etext and the LMA of .data if strongly-aligned data were added to .data, although only a word alignment is required here. The same considerations apply to the VMA of .data. However, it is already automatically word-aligned, both because .data contains words, and because the end VMA of the previous output section (.socdata) is word-aligned. Moreover, if the VMA of .data were forcibly word-aligned, then a filled gap could appear at the beginning of this section if strongly-aligned data were added to it, thus wasting flash memory. Consequently, it's better not to change anything for the VMA of .data, all the more it's very unlikely that it does not contain any word and that the end VMA of .socdata becomes non-word-aligned, and this would only result in a slower initialization. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2015-05-17 19:34:01 +00:00
.data : ALIGN(4)
{
_data = .;
*(.data*)
_edata = .;
} > FRSRAM AT > FLASH_FW
_ldata = LOADADDR(.data);
.ARM.exidx :
{
*(.ARM.exidx*)
} > FLASH_FW
.bss :
{
_bss = .;
*(.bss*)
*(COMMON)
_ebss = .;
} > FRSRAM
.stack (NOLOAD) :
{
*(.stack)
} > FRSRAM
2015-05-26 18:03:37 +00:00
_heap = .;
_eheap = ORIGIN(FRSRAM) + LENGTH(FRSRAM);
.nrdata (NOLOAD) :
{
_nrdata = .;
*(.nrdata*)
_enrdata = .;
} > NRSRAM
.flashcca :
{
*(.flashcca)
} > FLASH_CCA
}