From 1a696eb123613835a6c8ae663ed79f87395c4874 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Tue, 26 Nov 2013 22:20:05 +0100 Subject: [PATCH] cc2538: gpio: Clear the power-up interrupts in the port ISRs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The pending GPIO power-up interrupts have to be cleared in the ISRs in order not to re-trigger the interrupts and the wake-up events. The power-up interrupts of all pins are cleared for each port in the corresponding port ISR. This is done after calling the registered callbacks so that the callbacks can know which pin woke up the SoC. This is done after clearing the regular interrupt in order to avoid getting a new wake-up interrupt without the regular interrupt in the case of a new wake-up edge occurring between the two clears. Signed-off-by: Benoît Thébaudeau --- cpu/cc2538/dev/gpio.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/cpu/cc2538/dev/gpio.c b/cpu/cc2538/dev/gpio.c index 80a1b7d8d..111946001 100644 --- a/cpu/cc2538/dev/gpio.c +++ b/cpu/cc2538/dev/gpio.c @@ -90,6 +90,7 @@ gpio_port_a_isr() notify(REG(GPIO_A_BASE | GPIO_MIS), GPIO_A_NUM); GPIO_CLEAR_INTERRUPT(GPIO_A_BASE, 0xFF); + GPIO_CLEAR_POWER_UP_INTERRUPT(GPIO_A_NUM, 0xFF); ENERGEST_OFF(ENERGEST_TYPE_IRQ); } @@ -105,6 +106,7 @@ gpio_port_b_isr() notify(REG(GPIO_B_BASE | GPIO_MIS), GPIO_B_NUM); GPIO_CLEAR_INTERRUPT(GPIO_B_BASE, 0xFF); + GPIO_CLEAR_POWER_UP_INTERRUPT(GPIO_B_NUM, 0xFF); ENERGEST_OFF(ENERGEST_TYPE_IRQ); } @@ -120,6 +122,7 @@ gpio_port_c_isr() notify(REG(GPIO_C_BASE | GPIO_MIS), GPIO_C_NUM); GPIO_CLEAR_INTERRUPT(GPIO_C_BASE, 0xFF); + GPIO_CLEAR_POWER_UP_INTERRUPT(GPIO_C_NUM, 0xFF); ENERGEST_OFF(ENERGEST_TYPE_IRQ); } @@ -135,6 +138,7 @@ gpio_port_d_isr() notify(REG(GPIO_D_BASE | GPIO_MIS), GPIO_D_NUM); GPIO_CLEAR_INTERRUPT(GPIO_D_BASE, 0xFF); + GPIO_CLEAR_POWER_UP_INTERRUPT(GPIO_D_NUM, 0xFF); ENERGEST_OFF(ENERGEST_TYPE_IRQ); }