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I think that is set_power
This commit is contained in:
Mariano Alvira
parent
2120524903
commit
28e49b8a7d
@ -180,3 +180,95 @@ figure out how it's used and, preferably, what it means.
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So buffer_radio_init is necessary for their code to work. I'm not sure
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if it is necessary for the radio of if it's necessary for there app.
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Now I need to figure these out:
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(void)MLMEPAOutputAdjust(gu8CurrentPowerLevel);
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MLMESetChannelRequest((channel_num_t)gu8CurrentChannel);
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#define gPowerLevel_m30dBm_c 0x00
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#define gPowerLevel_m28dBm_c 0x01
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#define gPowerLevel_m26dBm_c 0x02
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#define gPowerLevel_m24dBm_c 0x03
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#define gPowerLevel_m22dBm_c 0x04
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#define gPowerLevel_m20dBm_c 0x05
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#define gPowerLevel_m18dBm_c 0x06
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#define gPowerLevel_m16dBm_c 0x07
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#define gPowerLevel_m14dBm_c 0x08
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#define gPowerLevel_m12dBm_c 0x09
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#define gPowerLevel_m10dBm_c 0x0a
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#define gPowerLevel_m8dBm_c 0x0b
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#define gPowerLevel_m6dBm_c 0x0c
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#define gPowerLevel_m4dBm_c 0x0d
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#define gPowerLevel_m2dBm_c 0x0e
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#define gPowerLevel_0dBm_c 0x0f
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#define gPowerLevel_2dBm_c 0x10
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#define gPowerLevel_4dBm_c 0x11
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#define gPowerLevel_6dBm_c 0x12
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gu8CurrentPowerLevel is set to gPowerLevel_0dBm_c = 0x0f
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some kind of look-up table for setpower
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004037e4 <gPSMVAL_c>:
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4037e4: 0000080f .word 0x0000080f
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4037e8: 0000080f .word 0x0000080f
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4037ec: 0000080f .word 0x0000080f
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4037f0: 0000080f .word 0x0000080f
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4037f4: 0000081f .word 0x0000081f
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4037f8: 0000081f .word 0x0000081f
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4037fc: 0000081f .word 0x0000081f
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403800: 0000080f .word 0x0000080f
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403804: 0000080f .word 0x0000080f
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403808: 0000080f .word 0x0000080f
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40380c: 0000001f .word 0x0000001f
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403810: 0000000f .word 0x0000000f
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403814: 0000000f .word 0x0000000f
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403818: 00000816 .word 0x00000816
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40381c: 0000001b .word 0x0000001b
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403820: 0000000b .word 0x0000000b
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403824: 00000802 .word 0x00000802
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403828: 00000817 .word 0x00000817
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40382c: 00000003 .word 0x00000003
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00403830 <gPAVAL_c>:
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403830: 000022c0 .word 0x000022c0
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403834: 000022c0 .word 0x000022c0
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403838: 000022c0 .word 0x000022c0
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40383c: 00002280 .word 0x00002280
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403840: 00002303 .word 0x00002303
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403844: 000023c0 .word 0x000023c0
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403848: 00002880 .word 0x00002880
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40384c: 000029f0 .word 0x000029f0
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403850: 000029f0 .word 0x000029f0
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403854: 000029f0 .word 0x000029f0
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403858: 000029c0 .word 0x000029c0
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40385c: 00002bf0 .word 0x00002bf0
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403860: 000029f0 .word 0x000029f0
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403864: 000028a0 .word 0x000028a0
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403868: 00002800 .word 0x00002800
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40386c: 00002ac0 .word 0x00002ac0
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403870: 00002880 .word 0x00002880
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403874: 00002a00 .word 0x00002a00
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403878: 00002b00 .word 0x00002b00
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0040387c <gAIMVAL_c>:
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40387c: 000123a0 .word 0x000123a0
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403880: 000163a0 .word 0x000163a0
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403884: 0001a3a0 .word 0x0001a3a0
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403888: 0001e3a0 .word 0x0001e3a0
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40388c: 000223a0 .word 0x000223a0
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403890: 000263a0 .word 0x000263a0
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403894: 0002a3a0 .word 0x0002a3a0
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403898: 0002e3a0 .word 0x0002e3a0
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40389c: 000323a0 .word 0x000323a0
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4038a0: 000363a0 .word 0x000363a0
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4038a4: 0003a3a0 .word 0x0003a3a0
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4038a8: 0003a3a0 .word 0x0003a3a0
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4038ac: 0003e3a0 .word 0x0003e3a0
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4038b0: 000423a0 .word 0x000423a0
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4038b4: 000523a0 .word 0x000523a0
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4038b8: 000423a0 .word 0x000423a0
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4038bc: 0004e3a0 .word 0x0004e3a0
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4038c0: 0004e3a0 .word 0x0004e3a0
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4038c4: 0004e3a0 .word 0x0004e3a0
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86
doc/ws.dis
86
doc/ws.dis
@ -5311,32 +5311,32 @@ Disassembly of section P2:
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004030ec <SetChannel>:
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4030ec: b430 push {r4, r5}
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4030ee: 4b1d ldr r3, [pc, #116] (403164 <GetCurrentChannel+0x38>)
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4030f0: 681c ldr r4, [r3, #0]
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4030f2: 4d1d ldr r5, [pc, #116] (403168 <GetCurrentChannel+0x3c>)
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4030f4: 4025 ands r5, r4
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4030f6: 601d str r5, [r3, #0]
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4030f8: 60d9 str r1, [r3, #12]
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4030fa: 611a str r2, [r3, #16]
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4030fc: 6b19 ldr r1, [r3, #48]
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4030fe: 2202 movs r2, #2
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403100: 430a orrs r2, r1
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403102: 631a str r2, [r3, #48]
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403104: 6b19 ldr r1, [r3, #48]
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403106: 2204 movs r2, #4
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403108: 430a orrs r2, r1
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40310a: 631a str r2, [r3, #48]
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40310c: 0011 lsls r1, r2, #0
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40310e: 4a06 ldr r2, [pc, #24] (403128 <SetChannel+0x3c>)
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403110: 400a ands r2, r1
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403112: 4923 ldr r1, [pc, #140] (4031a0 <fill_ram_struct+0x18>)
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403114: 1808 adds r0, r1, r0
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403116: 7a00 ldrb r0, [r0, #8]
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403118: 0200 lsls r0, r0, #8
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40311a: 21f8 movs r1, #248
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40311c: 0149 lsls r1, r1, #5
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40311e: 4001 ands r1, r0
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403120: 4311 orrs r1, r2
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403122: 6319 str r1, [r3, #48]
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4030f0: 681c ldr r4, [r3, #0] //r4 = *0x80009800
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4030f2: 4d1d ldr r5, [pc, #116] (403168 <GetCurrentChannel+0x3c>) //0xbfffffff
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4030f4: 4025 ands r5, r4 // r5 = *0x80009800 & 0xbfffffff
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4030f6: 601d str r5, [r3, #0] // *0x80009800 = r5
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4030f8: 60d9 str r1, [r3, #12] // *0x80009800+12 = r3
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4030fa: 611a str r2, [r3, #16] // *0x80009800+12 = r2
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4030fc: 6b19 ldr r1, [r3, #48] // r1 = *0x80009800+48
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4030fe: 2202 movs r2, #2 // r2 = 2
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403100: 430a orrs r2, r1 // r2 = r1 | 2
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403102: 631a str r2, [r3, #48] // *0x80009800+48 = r2
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403104: 6b19 ldr r1, [r3, #48] // r1 = *0x80009800+48
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403106: 2204 movs r2, #4 // r2 = 4;
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403108: 430a orrs r2, r1 // r2 = r1 | 4
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40310a: 631a str r2, [r3, #48] // // *0x80009800+48 = r2
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40310c: 0011 lsls r1, r2, #0 // r1 = r2
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40310e: 4a06 ldr r2, [pc, #24] (403128 <SetChannel+0x3c>) r2 = 0xffffe0ff;
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403110: 400a ands r2, r1 // r2 = r1 & 0xffffe0ff;
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403112: 4923 ldr r1, [pc, #140] (4031a0 <fill_ram_struct+0x18>) // r1 gets &ram_init_val
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403114: 1808 adds r0, r1, r0 // offset
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403116: 7a00 ldrb r0, [r0, #8] // r0 gets ram_init_val+8+offset = buffer_radio_init[offset]
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403118: 0200 lsls r0, r0, #8 // shift that left 8
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40311a: 21f8 movs r1, #248 // r1 = 248
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40311c: 0149 lsls r1, r1, #5 // r1 = 0x1F00
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40311e: 4001 ands r1, r0 // r1 gets r0 & 0x1F00
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403120: 4311 orrs r1, r2 // ored with r2
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403122: 6319 str r1, [r3, #48] // r3+48 gets r1... 0x80009800+48
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403124: bc30 pop {r4, r5}
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403126: 4770 bx lr
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403128: ffffe0ff .word 0xffffe0ff
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@ -5370,7 +5370,7 @@ Disassembly of section P2:
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40315e: 4770 bx lr
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403160: 8000980c .word 0x8000980c
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403164: 80009800 .word 0x80009800
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403168: bfffffff .word 0xbfffffff
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403168: bfffffff .wor 0xbfffffff
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0040316c <get_ctov>:
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40316c: 4a04 ldr r2, [pc, #16] (403180 <get_ctov+0x14>) r2=0x00dfbe77
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@ -6770,26 +6770,26 @@ Disassembly of section P2:
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00403dc8 <SetPower>:
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403dc8: b418 push {r3, r4}
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403dca: 0080 lsls r0, r0, #2
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403dcc: 4a0a ldr r2, [pc, #40] (403df8 <SetPower+0x30>)
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403dce: 5813 ldr r3, [r2, r0]
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403dd0: 4c0a ldr r4, [pc, #40] (403dfc <SetPower+0x34>)
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403dd2: 6023 str r3, [r4, #0]
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403dd4: 1810 adds r0, r2, r0
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403dd6: 304c adds r0, #76
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403dd8: 6802 ldr r2, [r0, #0]
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403dda: 2901 cmp r1, #1
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403ddc: d103 bne.n 403de6 <SetPower+0x1e>
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403dca: 0080 lsls r0, r0, #2 // r0 = r0 * 4
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403dcc: 4a0a ldr r2, [pc, #40] (403df8 <SetPower+0x30>) // r2 = 0x004037e4 <gPSMVAL_c>:
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403dce: 5813 ldr r3, [r2, r0] // r3 gets gPSMVAL_c[r0]
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403dd0: 4c0a ldr r4, [pc, #40] (403dfc <SetPower+0x34>) //r4 = 0x8000a014
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403dd2: 6023 str r3, [r4, #0] // *0x8000a014 = r3
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403dd4: 1810 adds r0, r2, r0 // add the offset to gPSMVAL_c pointer
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403dd6: 304c adds r0, #76 // point to gPSMVAL_c+76+offset (gPAVAL_c[offset])
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403dd8: 6802 ldr r2, [r0, #0] // r2 = gPAVAL_c[offset]
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403dda: 2901 cmp r1, #1 // 1 mode? (what's 1 mode?) don't know MLMEPAOutputPower sets r1 to 0
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403ddc: d103 bne.n 403de6 <SetPower+0x1e> // branch to 1:
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403dde: 0021 lsls r1, r4, #0
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403de0: 4b07 ldr r3, [pc, #28] (403e00 <SetPower+0x38>)
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403de2: 4013 ands r3, r2
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403de4: e002 b.n 403dec <SetPower+0x24>
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403de6: 0021 lsls r1, r4, #0
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403de8: 0c8b lsrs r3, r1, #18
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403dea: 4313 orrs r3, r2
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403dec: 60cb str r3, [r1, #12]
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403dee: 6cc0 ldr r0, [r0, #76]
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403df0: 6408 str r0, [r1, #64]
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403de6: 0021 lsls r1, r4, #0 // 1: r1 = r4 = 0x8000a014
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403de8: 0c8b lsrs r3, r1, #18 // r3 = 0x8000a014 >> 18
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403dea: 4313 orrs r3, r2 // r3 = (0x8000a014 >> 18) | gPAVAL_c[offset]
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403dec: 60cb str r3, [r1, #12] // *(0x8000a014 + 12) = r3
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403dee: 6cc0 ldr r0, [r0, #76] // r0 = gPAVAL_c[offset]+76 (gAIMVAL_c)
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403df0: 6408 str r0, [r1, #64] // *(0x8000a014 + 64) = gAIMVAL_c[offset]
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403df2: bc11 pop {r0, r4}
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403df4: 4770 bx lr
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403df6: 46c0 nop (mov r8, r8)
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75
src/maca.c
75
src/maca.c
@ -182,6 +182,81 @@ void radio_init(void) {
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}
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}
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const uint32_t PSMVAL[19] = {
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0x0000080f,
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0x0000080f,
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0x0000080f,
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0x0000080f,
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0x0000081f,
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0x0000081f,
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0x0000081f,
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0x0000080f,
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0x0000080f,
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0x0000080f,
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0x0000001f,
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0x0000000f,
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0x0000000f,
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0x00000816,
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0x0000001b,
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0x0000000b,
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0x00000802,
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0x00000817,
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0x00000003,
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};
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const uint32_t PAVAL[19] = {
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0x000022c0,
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0x000022c0,
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0x000022c0,
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0x00002280,
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0x00002303,
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0x000023c0,
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0x00002880,
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0x000029f0,
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0x000029f0,
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0x000029f0,
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0x000029c0,
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0x00002bf0,
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0x000029f0,
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0x000028a0,
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0x00002800,
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0x00002ac0,
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0x00002880,
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0x00002a00,
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0x00002b00,
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};
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const uint32_t AIMVAL[19] = {
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0x000123a0,
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0x000163a0,
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0x0001a3a0,
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0x0001e3a0,
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0x000223a0,
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0x000263a0,
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0x0002a3a0,
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0x0002e3a0,
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0x000323a0,
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0x000363a0,
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0x0003a3a0,
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0x0003a3a0,
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0x0003e3a0,
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0x000423a0,
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0x000523a0,
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0x000423a0,
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0x0004e3a0,
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0x0004e3a0,
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0x0004e3a0,
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};
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#define ADDR_POW1 0x8000a014
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#define ADDR_POW2 ADDR_POW1 + 12
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#define ADDR_POW3 ADDR_POW1 + 64
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void set_power(uint8_t power) {
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reg(ADDR_POW1) = PSMVAL[power];
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reg(ADDR_POW2) = (ADDR_POW1>>18) | PAVAL[power];
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reg(ADDR_POW3) = AIMVAL[power];
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}
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/*
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* Do the ABORT-Wait-NOP-Wait sequence in order to prevent MACA malfunctioning.
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* This seqeunce is synchronous and no interrupts should be triggered when it is done.
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