diff --git a/doc/radioinit b/doc/radioinit
index 1196e05af..9335b3ed5 100644
--- a/doc/radioinit
+++ b/doc/radioinit
@@ -180,3 +180,95 @@ figure out how it's used and, preferably, what it means.
 So buffer_radio_init is necessary for their code to work. I'm not sure
 if it is necessary for the radio of if it's necessary for there app. 
 
+Now I need to figure these out:
+
+ (void)MLMEPAOutputAdjust(gu8CurrentPowerLevel);
+  MLMESetChannelRequest((channel_num_t)gu8CurrentChannel);
+
+
+#define gPowerLevel_m30dBm_c 0x00
+#define gPowerLevel_m28dBm_c 0x01
+#define gPowerLevel_m26dBm_c 0x02
+#define gPowerLevel_m24dBm_c 0x03
+#define gPowerLevel_m22dBm_c 0x04
+#define gPowerLevel_m20dBm_c 0x05
+#define gPowerLevel_m18dBm_c 0x06
+#define gPowerLevel_m16dBm_c 0x07 
+#define gPowerLevel_m14dBm_c 0x08
+#define gPowerLevel_m12dBm_c 0x09 
+#define gPowerLevel_m10dBm_c 0x0a
+#define gPowerLevel_m8dBm_c  0x0b
+#define gPowerLevel_m6dBm_c  0x0c
+#define gPowerLevel_m4dBm_c  0x0d
+#define gPowerLevel_m2dBm_c  0x0e
+#define gPowerLevel_0dBm_c   0x0f
+#define gPowerLevel_2dBm_c   0x10
+#define gPowerLevel_4dBm_c   0x11
+#define gPowerLevel_6dBm_c   0x12
+
+gu8CurrentPowerLevel is set to gPowerLevel_0dBm_c = 0x0f
+
+some kind of look-up table for setpower
+
+004037e4 <gPSMVAL_c>:
+  4037e4:       0000080f        .word   0x0000080f
+  4037e8:       0000080f        .word   0x0000080f
+  4037ec:       0000080f        .word   0x0000080f
+  4037f0:       0000080f        .word   0x0000080f
+  4037f4:       0000081f        .word   0x0000081f
+  4037f8:       0000081f        .word   0x0000081f
+  4037fc:       0000081f        .word   0x0000081f
+  403800:       0000080f        .word   0x0000080f
+  403804:       0000080f        .word   0x0000080f
+  403808:       0000080f        .word   0x0000080f
+  40380c:       0000001f        .word   0x0000001f
+  403810:       0000000f        .word   0x0000000f
+  403814:       0000000f        .word   0x0000000f
+  403818:       00000816        .word   0x00000816
+  40381c:       0000001b        .word   0x0000001b
+  403820:       0000000b        .word   0x0000000b
+  403824:       00000802        .word   0x00000802
+  403828:       00000817        .word   0x00000817
+  40382c:       00000003        .word   0x00000003
+
+00403830 <gPAVAL_c>:
+  403830:       000022c0        .word   0x000022c0
+  403834:       000022c0        .word   0x000022c0
+  403838:       000022c0        .word   0x000022c0
+  40383c:       00002280        .word   0x00002280
+  403840:       00002303        .word   0x00002303
+  403844:       000023c0        .word   0x000023c0
+  403848:       00002880        .word   0x00002880
+  40384c:       000029f0        .word   0x000029f0
+  403850:       000029f0        .word   0x000029f0
+  403854:       000029f0        .word   0x000029f0
+  403858:       000029c0        .word   0x000029c0
+  40385c:       00002bf0        .word   0x00002bf0
+  403860:       000029f0        .word   0x000029f0
+  403864:       000028a0        .word   0x000028a0
+  403868:       00002800        .word   0x00002800
+  40386c:       00002ac0        .word   0x00002ac0
+  403870:       00002880        .word   0x00002880
+  403874:       00002a00        .word   0x00002a00
+  403878:       00002b00        .word   0x00002b00
+
+0040387c <gAIMVAL_c>:
+  40387c:       000123a0        .word   0x000123a0
+  403880:       000163a0        .word   0x000163a0
+  403884:       0001a3a0        .word   0x0001a3a0
+  403888:       0001e3a0        .word   0x0001e3a0
+  40388c:       000223a0        .word   0x000223a0
+  403890:       000263a0        .word   0x000263a0
+  403894:       0002a3a0        .word   0x0002a3a0
+  403898:       0002e3a0        .word   0x0002e3a0
+  40389c:       000323a0        .word   0x000323a0
+  4038a0:       000363a0        .word   0x000363a0
+  4038a4:       0003a3a0        .word   0x0003a3a0
+  4038a8:       0003a3a0        .word   0x0003a3a0
+  4038ac:       0003e3a0        .word   0x0003e3a0
+  4038b0:       000423a0        .word   0x000423a0
+  4038b4:       000523a0        .word   0x000523a0
+  4038b8:       000423a0        .word   0x000423a0
+  4038bc:       0004e3a0        .word   0x0004e3a0
+  4038c0:       0004e3a0        .word   0x0004e3a0
+  4038c4:       0004e3a0        .word   0x0004e3a0
diff --git a/doc/ws.dis b/doc/ws.dis
index 1f5ce82b3..d1df8244e 100644
--- a/doc/ws.dis
+++ b/doc/ws.dis
@@ -5311,32 +5311,32 @@ Disassembly of section P2:
 004030ec <SetChannel>:
   4030ec:	b430      	push	{r4, r5}
   4030ee:	4b1d      	ldr	r3, [pc, #116]	(403164 <GetCurrentChannel+0x38>)
-  4030f0:	681c      	ldr	r4, [r3, #0]
-  4030f2:	4d1d      	ldr	r5, [pc, #116]	(403168 <GetCurrentChannel+0x3c>)
-  4030f4:	4025      	ands	r5, r4
-  4030f6:	601d      	str	r5, [r3, #0]
-  4030f8:	60d9      	str	r1, [r3, #12]
-  4030fa:	611a      	str	r2, [r3, #16]
-  4030fc:	6b19      	ldr	r1, [r3, #48]
-  4030fe:	2202      	movs	r2, #2
-  403100:	430a      	orrs	r2, r1
-  403102:	631a      	str	r2, [r3, #48]
-  403104:	6b19      	ldr	r1, [r3, #48]
-  403106:	2204      	movs	r2, #4
-  403108:	430a      	orrs	r2, r1
-  40310a:	631a      	str	r2, [r3, #48]
-  40310c:	0011      	lsls	r1, r2, #0
-  40310e:	4a06      	ldr	r2, [pc, #24]	(403128 <SetChannel+0x3c>)
-  403110:	400a      	ands	r2, r1
-  403112:	4923      	ldr	r1, [pc, #140]	(4031a0 <fill_ram_struct+0x18>)
-  403114:	1808      	adds	r0, r1, r0
-  403116:	7a00      	ldrb	r0, [r0, #8]
-  403118:	0200      	lsls	r0, r0, #8
-  40311a:	21f8      	movs	r1, #248
-  40311c:	0149      	lsls	r1, r1, #5
-  40311e:	4001      	ands	r1, r0
-  403120:	4311      	orrs	r1, r2
-  403122:	6319      	str	r1, [r3, #48]
+  4030f0:	681c      	ldr	r4, [r3, #0]    //r4 = *0x80009800
+  4030f2:	4d1d      	ldr	r5, [pc, #116]	(403168 <GetCurrentChannel+0x3c>) //0xbfffffff
+  4030f4:	4025      	ands	r5, r4          // r5 = *0x80009800 & 0xbfffffff
+  4030f6:	601d      	str	r5, [r3, #0]    // *0x80009800 = r5
+  4030f8:	60d9      	str	r1, [r3, #12]   // *0x80009800+12 = r3
+  4030fa:	611a      	str	r2, [r3, #16]   // *0x80009800+12 = r2
+  4030fc:	6b19      	ldr	r1, [r3, #48]   // r1 = *0x80009800+48
+  4030fe:	2202      	movs	r2, #2          // r2 = 2
+  403100:	430a      	orrs	r2, r1          // r2 = r1 | 2
+  403102:	631a      	str	r2, [r3, #48]   // *0x80009800+48 = r2 
+  403104:	6b19      	ldr	r1, [r3, #48]   // r1 = *0x80009800+48
+  403106:	2204      	movs	r2, #4          // r2 = 4;
+  403108:	430a      	orrs	r2, r1          // r2 = r1 | 4
+  40310a:	631a      	str	r2, [r3, #48]   // // *0x80009800+48 = r2 
+  40310c:	0011      	lsls	r1, r2, #0      // r1 = r2
+  40310e:	4a06      	ldr	r2, [pc, #24]	(403128 <SetChannel+0x3c>) r2 = 0xffffe0ff;
+  403110:	400a      	ands	r2, r1          // r2 = r1 & 0xffffe0ff;
+  403112:	4923      	ldr	r1, [pc, #140]	(4031a0 <fill_ram_struct+0x18>) // r1 gets &ram_init_val
+  403114:	1808      	adds	r0, r1, r0      // offset
+  403116:	7a00      	ldrb	r0, [r0, #8]    // r0 gets ram_init_val+8+offset = buffer_radio_init[offset]
+  403118:	0200      	lsls	r0, r0, #8      // shift that left 8
+  40311a:	21f8      	movs	r1, #248        // r1 = 248
+  40311c:	0149      	lsls	r1, r1, #5      // r1 = 0x1F00
+  40311e:	4001      	ands	r1, r0          // r1 gets r0 & 0x1F00
+  403120:	4311      	orrs	r1, r2          // ored with r2 
+  403122:	6319      	str	r1, [r3, #48]   // r3+48 gets r1... 0x80009800+48
   403124:	bc30      	pop	{r4, r5}
   403126:	4770      	bx	lr
   403128:	ffffe0ff 	.word	0xffffe0ff
@@ -5370,7 +5370,7 @@ Disassembly of section P2:
   40315e:	4770      	bx	lr
   403160:	8000980c 	.word	0x8000980c
   403164:	80009800 	.word	0x80009800
-  403168:	bfffffff 	.word	0xbfffffff
+  403168:	bfffffff 	.wor	0xbfffffff
 
 0040316c <get_ctov>:
   40316c:	4a04      	ldr	r2, [pc, #16]	(403180 <get_ctov+0x14>) r2=0x00dfbe77
@@ -6770,26 +6770,26 @@ Disassembly of section P2:
 
 00403dc8 <SetPower>:
   403dc8:	b418      	push	{r3, r4}
-  403dca:	0080      	lsls	r0, r0, #2
-  403dcc:	4a0a      	ldr	r2, [pc, #40]	(403df8 <SetPower+0x30>)
-  403dce:	5813      	ldr	r3, [r2, r0]
-  403dd0:	4c0a      	ldr	r4, [pc, #40]	(403dfc <SetPower+0x34>)
-  403dd2:	6023      	str	r3, [r4, #0]
-  403dd4:	1810      	adds	r0, r2, r0
-  403dd6:	304c      	adds	r0, #76
-  403dd8:	6802      	ldr	r2, [r0, #0]
-  403dda:	2901      	cmp	r1, #1
-  403ddc:	d103      	bne.n	403de6 <SetPower+0x1e>
+  403dca:	0080      	lsls	r0, r0, #2      // r0 = r0 * 4
+  403dcc:	4a0a      	ldr	r2, [pc, #40]	(403df8 <SetPower+0x30>) // r2 = 0x004037e4 <gPSMVAL_c>:
+  403dce:	5813      	ldr	r3, [r2, r0]    // r3 gets gPSMVAL_c[r0] 
+  403dd0:	4c0a      	ldr	r4, [pc, #40]	(403dfc <SetPower+0x34>) //r4 = 0x8000a014
+  403dd2:	6023      	str	r3, [r4, #0]    // *0x8000a014 = r3
+  403dd4:	1810      	adds	r0, r2, r0      // add the offset to gPSMVAL_c pointer
+  403dd6:	304c      	adds	r0, #76         // point to gPSMVAL_c+76+offset (gPAVAL_c[offset])
+  403dd8:	6802      	ldr	r2, [r0, #0]    // r2 = gPAVAL_c[offset]
+  403dda:	2901      	cmp	r1, #1          // 1 mode? (what's 1 mode?) don't know MLMEPAOutputPower sets r1 to 0
+  403ddc:	d103      	bne.n	403de6 <SetPower+0x1e> // branch to 1: 
   403dde:	0021      	lsls	r1, r4, #0
   403de0:	4b07      	ldr	r3, [pc, #28]	(403e00 <SetPower+0x38>)
   403de2:	4013      	ands	r3, r2
   403de4:	e002      	b.n	403dec <SetPower+0x24>
-  403de6:	0021      	lsls	r1, r4, #0
-  403de8:	0c8b      	lsrs	r3, r1, #18
-  403dea:	4313      	orrs	r3, r2
-  403dec:	60cb      	str	r3, [r1, #12]
-  403dee:	6cc0      	ldr	r0, [r0, #76]
-  403df0:	6408      	str	r0, [r1, #64]
+  403de6:	0021      	lsls	r1, r4, #0      // 1: r1 = r4 = 0x8000a014
+  403de8:	0c8b      	lsrs	r3, r1, #18     // r3 = 0x8000a014 >> 18
+  403dea:	4313      	orrs	r3, r2          // r3 = (0x8000a014 >> 18) | gPAVAL_c[offset]
+  403dec:	60cb      	str	r3, [r1, #12]   // *(0x8000a014 + 12) = r3 
+  403dee:	6cc0      	ldr	r0, [r0, #76]   // r0 = gPAVAL_c[offset]+76 (gAIMVAL_c)
+  403df0:	6408      	str	r0, [r1, #64]   // *(0x8000a014 + 64) = gAIMVAL_c[offset]
   403df2:	bc11      	pop	{r0, r4}
   403df4:	4770      	bx	lr
   403df6:	46c0      	nop			(mov r8, r8)
diff --git a/src/maca.c b/src/maca.c
index a024f8542..21117a56e 100644
--- a/src/maca.c
+++ b/src/maca.c
@@ -182,6 +182,81 @@ void radio_init(void) {
 	}
 }
 
+const uint32_t PSMVAL[19] = {
+	0x0000080f,
+	0x0000080f,
+	0x0000080f,
+	0x0000080f,
+	0x0000081f,
+	0x0000081f,
+	0x0000081f,
+	0x0000080f,
+	0x0000080f,
+	0x0000080f,
+	0x0000001f,
+	0x0000000f,
+	0x0000000f,
+	0x00000816,
+	0x0000001b,
+	0x0000000b,
+	0x00000802,
+	0x00000817,
+	0x00000003,
+};
+
+const uint32_t PAVAL[19] = {
+	0x000022c0,
+	0x000022c0,
+	0x000022c0,
+	0x00002280,
+	0x00002303,
+	0x000023c0,
+	0x00002880,
+	0x000029f0,
+	0x000029f0,
+	0x000029f0,
+	0x000029c0,
+	0x00002bf0,
+	0x000029f0,
+	0x000028a0,
+	0x00002800,
+	0x00002ac0,
+	0x00002880,
+	0x00002a00,
+	0x00002b00,
+};
+
+const uint32_t AIMVAL[19] = {
+	0x000123a0,
+	0x000163a0,
+	0x0001a3a0,
+	0x0001e3a0,
+	0x000223a0,
+	0x000263a0,
+	0x0002a3a0,
+	0x0002e3a0,
+	0x000323a0,
+	0x000363a0,
+	0x0003a3a0,
+	0x0003a3a0,
+	0x0003e3a0,
+	0x000423a0,
+	0x000523a0,
+	0x000423a0,
+	0x0004e3a0,
+	0x0004e3a0,
+	0x0004e3a0,
+};
+
+#define ADDR_POW1 0x8000a014
+#define ADDR_POW2 ADDR_POW1 + 12
+#define ADDR_POW3 ADDR_POW1 + 64
+void set_power(uint8_t power) {
+	reg(ADDR_POW1) = PSMVAL[power];
+	reg(ADDR_POW2) = (ADDR_POW1>>18) | PAVAL[power];
+	reg(ADDR_POW3) = AIMVAL[power];
+}
+
 /* 
  * Do the ABORT-Wait-NOP-Wait sequence in order to prevent MACA malfunctioning.
  * This seqeunce is synchronous and no interrupts should be triggered when it is done.