From 923f161b7b4da5a8833a9b95fc7faf7297eef1e8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?=
 <benoit.thebaudeau@advansee.com>
Date: Fri, 15 Nov 2013 19:48:24 +0100
Subject: [PATCH] cc2538: gpio: Add pin read / write and interrupt clear macros
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Introduce new useful GPIO macros to:
 - read the levels of some port pins,
 - write the levels of some port pins (pass bit-field value to be set),
 - clear the interrupt flags for some port pins.

These macros are cleaner and less error prone than raw register access code
copied all over the place.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
---
 cpu/cc2538/dev/gpio.h | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/cpu/cc2538/dev/gpio.h b/cpu/cc2538/dev/gpio.h
index eb2851270..c81482c9e 100644
--- a/cpu/cc2538/dev/gpio.h
+++ b/cpu/cc2538/dev/gpio.h
@@ -114,6 +114,20 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
 #define GPIO_CLR_PIN(PORT_BASE, PIN_MASK) \
   do { REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2)) = 0x00; } while(0)
 
+/** \brief Set pins with PIN_MASK of port with PORT_BASE to value.
+ * \param PORT_BASE GPIO Port register offset
+ * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
+ */
+#define GPIO_WRITE_PIN(PORT_BASE, PIN_MASK, value) \
+  do { REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2)) = (value); } while(0)
+
+/** \brief Read pins with PIN_MASK of port with PORT_BASE.
+ * \param PORT_BASE GPIO Port register offset
+ * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
+ */
+#define GPIO_READ_PIN(PORT_BASE, PIN_MASK) \
+  REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2))
+
 /** \brief Set pins with PIN_MASK of port with PORT_BASE to detect edge.
  * \param PORT_BASE GPIO Port register offset
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
@@ -176,6 +190,14 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
 #define GPIO_DISABLE_INTERRUPT(PORT_BASE, PIN_MASK) \
   do { REG((PORT_BASE) | GPIO_IE) &= ~(PIN_MASK); } while(0)
 
+/** \brief Clear interrupt triggering for pins with PIN_MASK of port with
+ * PORT_BASE.
+ * \param PORT_BASE GPIO Port register offset
+ * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
+ */
+#define GPIO_CLEAR_INTERRUPT(PORT_BASE, PIN_MASK) \
+  do { REG((PORT_BASE) | GPIO_IC) = (PIN_MASK); } while(0)
+
 /** \brief Configure the pin to be under peripheral control with PIN_MASK of
  * port with PORT_BASE.
  * \param PORT_BASE GPIO Port register offset