maybe the modem syn. needs to be set right.

reenabled the uart1-loopback code --- doesn't seem to be working ---
strange.
This commit is contained in:
Mariano Alvira 2009-04-04 15:27:08 -04:00
parent ef276e336c
commit a940f4db2b
3 changed files with 10 additions and 7 deletions

View File

@ -50,6 +50,7 @@ void main(void) {
reg(UART1_CON) = 0x00000003; /* enable receive and transmit */
reg(GPIO_FUNC_SEL0) = ( (0x01 << (14*2)) | (0x01 << (15*2)) ); /* set GPIO15-14 to UART (UART1 TX and RX)*/
reg(80009000) = 0x00050100;
reg(MACA_RESET) = 0x3; /* reset, turn on the clock */
for(i=0; i<DELAY; i++) { continue; }

View File

@ -50,6 +50,8 @@ void main(void) {
reg(UART1_CON) = 0x00000003; /* enable receive and transmit */
reg(GPIO_FUNC_SEL0) = ( (0x01 << (14*2)) | (0x01 << (15*2)) ); /* set GPIO15-14 to UART (UART1 TX and RX)*/
reg(80009000) = 0x00050100;
reg(MACA_RESET) = 0x3; /* reset, turn on the clock */
for(i=0; i<DELAY; i++) { continue; }
reg(MACA_RESET) = 0x2; /* unreset, turn on the clock */
@ -73,7 +75,7 @@ void main(void) {
while(1) {
puts("\033[H");
puts("rftest-tx --- " NL);
/*
puts("base +0 +4 +8 +c +10 +14 +18 +1c " NL);
for (i = 0; i < 96; i ++) {
if ((i & 7) == 0) {
@ -85,7 +87,7 @@ void main(void) {
puts(NL);
}
puts(NL);
*/
/* start a sequence */
reg(MACA_CONTROL) = 0x00031A03;

View File

@ -31,12 +31,12 @@ void main(void) {
uint8_t c;
while(1) {
*(volatile uint32_t *)UART1_DATA = (uint8_t)'U';
// if(*(volatile uint32_t*)UR1CON > 0) {
// *(volatile uint32_t *)UART1_DATA = (uint8_t)'U';
if(*(volatile uint32_t*)UR1CON > 0) {
/* Receive buffer isn't empty */
/* read a byte and write it to the transmit buffer */
// c = *(volatile uint32_t *)UART1_DATA;
// *(volatile uint32_t *)UART1_DATA = c;
// }
c = *(volatile uint32_t *)UART1_DATA;
*(volatile uint32_t *)UART1_DATA = c;
}
};
}