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removed redundant code - configuration of basic clock subsystem in clock and rtimer_arch
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parent
6441821fc3
commit
aaae9f4cf8
@ -28,7 +28,7 @@
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*
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*
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* This file is part of the Contiki operating system.
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* This file is part of the Contiki operating system.
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*
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*
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* @(#)$Id: clock.c,v 1.7 2007/05/22 20:59:27 adamdunkels Exp $
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* @(#)$Id: clock.c,v 1.8 2007/09/03 19:22:37 joxe Exp $
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*/
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*/
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@ -120,8 +120,6 @@ clock_init(void)
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count = 0;
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count = 0;
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BCSCTL1 &= ~(DIVA1 + DIVA0); /* remove /8 divisor from ACLK again */
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/* Enable interrupts. */
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/* Enable interrupts. */
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eint();
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eint();
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@ -28,7 +28,7 @@
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*
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*
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* This file is part of the Contiki operating system.
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* This file is part of the Contiki operating system.
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*
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*
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* $Id: rtimer-arch.c,v 1.4 2007/05/22 20:59:47 adamdunkels Exp $
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* $Id: rtimer-arch.c,v 1.5 2007/09/03 19:22:37 joxe Exp $
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*/
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*/
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/**
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/**
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@ -69,7 +69,7 @@ rtimer_arch_init(void)
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dint();
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dint();
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offset = 0;
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offset = 0;
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/* Select SMCLK (2.4576MHz), clear TAR; This makes the rtimer count
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/* Select SMCLK (2.4576MHz), clear TAR; This makes the rtimer count
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the number of processor cycles executed by the CPU. */
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the number of processor cycles executed by the CPU. */
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//TBCTL = TBSSEL1 | TBCLR;
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//TBCTL = TBSSEL1 | TBCLR;
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@ -82,8 +82,6 @@ rtimer_arch_init(void)
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/* Start Timer_B in continuous mode. */
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/* Start Timer_B in continuous mode. */
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TBCTL |= MC1;
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TBCTL |= MC1;
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BCSCTL1 &= ~(DIVA1 + DIVA0); /* remove /8 divisor from ACLK again */
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/* Enable interrupts. */
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/* Enable interrupts. */
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eint();
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eint();
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}
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}
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