From d077d3ee0242dfef3a3652e2550a68cca73cc339 Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Sat, 11 Apr 2009 17:48:43 -0400 Subject: [PATCH] working on a replacment radioinit using their calls. --- doc/radioinit | 49 +++++++++++++++++++++++++++++++++++++++++++------ doc/ws.dis | 34 +++++++++++++++++----------------- 2 files changed, 60 insertions(+), 23 deletions(-) diff --git a/doc/radioinit b/doc/radioinit index e9e15ec3e..1b4bc39ae 100644 --- a/doc/radioinit +++ b/doc/radioinit @@ -95,11 +95,48 @@ then maybe buckbypass sequence... 4 entries from r4+16 RadioInit is (roughly): SMAC_InitFromMemory(gRadioTOCCal1,40); - SMAC_InitFromMemeory(gRadioTOCCal2_24MHz_c,8); - SMAC_InitFromMemeory(gRadioTOCCal3,88); - SMAC_InitFromMemeory(gRadioTOCCal5,32); - SMAC_InitFromMemeory(gRadioInit_RegReplacement_c,344); + SMAC_InitFromMemory(gRadioTOCCal2_24MHz_c,8); + SMAC_InitFromMemory(gRadioTOCCal3_c,88); + SMAC_InitFromMemory(gRadioTOCCal5,32); + SMAC_InitFromMemory(gRadioInit_RegReplacement_c,344); SMAC_InitFromFlash(0x1F000); SMAC_InitFlybackSettings(); - /* then they check stuff in ram_init_val */ - /* getting a dump of that now */ + + v = get_ctov(0,ram_init_val[3]); +do { + ram_init_val[8] = v; + } while((v>>24)>16); + + +/* +After init from flash and flyback settings +ram_init_val - 004055d0 +004055d0 +base +0 +4 +8 +c +10 +14 +18 +1c +0000 00000000 00000000 00000000 00000000 00000000 00000000 80009400 00000017 + +u8RamValues +00405424 +base +0 +4 +8 +c +10 +14 +18 +1c +0000 0400009b 00000000 00000000 00010000 ff000000 00000000 00000000 00000000 +*/ + +/* + 40308e: f000 f86d bl 40316c //get_ctov(0,0x9b) + 403092: 1929 adds r1, r5, r4 // r4 = 0, r5 is &ram_init_val + 403094: 7208 strb r0, [r1, #8] + 403096: 1c64 adds r4, r4, #1 // r4=1 + 403098: 0620 lsls r0, r4, #24 + 40309a: 0e00 lsrs r0, r0, #24 + 40309c: 2810 cmp r0, #16 // + 40309e: d3f3 bcc.n 403088 // branch if higher + 4030a0: b001 add sp, #4 + 4030a2: 9804 ldr r0, [sp, #16] + 4030a4: bcf0 pop {r4, r5, r6, r7} + 4030a6: b001 add sp, #4 + 4030a8: 4700 bx r0 + 4030aa: 46c0 nop (mov r8, r8) + + +*/ + diff --git a/doc/ws.dis b/doc/ws.dis index 049857ca6..13c7ea688 100644 --- a/doc/ws.dis +++ b/doc/ws.dis @@ -5250,33 +5250,33 @@ Disassembly of section P2: 40305c: 0240 lsls r0, r0, #9 // r0 is now 0x1F000 40305e: f000 f8db bl 403218 // from flash --- this might be the regreplacment since that's in codespace... luckly we can call it directly and IAR links it in. looks like it sets a lot of the ram values that aren't getting set without it 403062: f000 f82f bl 4030c4 // looks like this happens... - 403066: 7928 ldrb r0, [r5, #4] // need a dump of r5 ram_init_val now + 403066: 7928 ldrb r0, [r5, #4] // need a dump of r5 ram_init_val now appears to be 0 403068: 2801 cmp r0, #1 - 40306a: d101 bne.n 403070 // say it doesn't branch, - 40306c: 2110 movs r1, #16 // r1 gets 16 - 40306e: e004 b.n 40307a // branch to 5 - 403070: 7968 ldrb r0, [r5, #5] - 403072: 2801 cmp r0, #1 - 403074: d104 bne.n 403080 // skips an init from memory + 40306a: d101 bne.n 403070 // branches + 40306c: 2110 movs r1, #16 + 40306e: e004 b.n 40307a + 403070: 7968 ldrb r0, [r5, #5] // appears to be 0 + 403072: 2801 cmp r0, #1 + 403074: d104 bne.n 403080 // branches to 6: 403076: 2120 movs r1, #32 403078: 3410 adds r4, #16 40307a: 0020 lsls r0, r4, #0 // 5: 40307c: f000 f932 bl 4032e4 // do 4 entries but from r4 of buck bypass - 403080: 480f ldr r0, [pc, #60] (4030c0 ) + 403080: 480f ldr r0, [pc, #60] (4030c0 ) // 6: 403082: f000 f881 bl 403188 // and a call to fill ram struct --- maybe important to the program? 403086: 2400 movs r4, #0 - 403088: 78e9 ldrb r1, [r5, #3] + 403088: 78e9 ldrb r1, [r5, #3] // appears to be 0x9b 40308a: 0620 lsls r0, r4, #24 - 40308c: 0e00 lsrs r0, r0, #24 - 40308e: f000 f86d bl 40316c - 403092: 1929 adds r1, r5, r4 - 403094: 7208 strb r0, [r1, #8] - 403096: 1c64 adds r4, r4, #1 + 40308c: 0e00 lsrs r0, r0, #24 + 40308e: f000 f86d bl 40316c //v=get_ctov(0,0x9b) + 403092: 1929 adds r1, r5, r4 // r4 = 0, r5 is &ram_init_val + 403094: 7208 strb r0, [r1, #8] + 403096: 1c64 adds r4, r4, #1 // r4 = 1 403098: 0620 lsls r0, r4, #24 40309a: 0e00 lsrs r0, r0, #24 - 40309c: 2810 cmp r0, #16 - 40309e: d3f3 bcc.n 403088 - 4030a0: b001 add sp, #4 + 40309c: 2810 cmp r0, #16 + 40309e: d3f3 bcc.n 403088 // branch if (v>>24)>16 + 4030a0: b001 add sp, #4 // return? 4030a2: 9804 ldr r0, [sp, #16] 4030a4: bcf0 pop {r4, r5, r6, r7} 4030a6: b001 add sp, #4