From f34731c1a92a146bbc5e4c79178eedc780b354d3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Mon, 4 Nov 2013 16:12:35 +0100 Subject: [PATCH 1/4] cc2538: spi: Do not call SPI_WAITFOREORx() at end of init MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If the SSI has never been used and spi_init() is called, then the SSI receive FIFO is empty and remains so, so calling SPI_WAITFOREORx() at the end of spi_init() waits endlessly for SSI_SR.RNE to be set. Hence, this call must be removed in order to avoid a deadlock. Signed-off-by: Benoît Thébaudeau --- cpu/cc2538/dev/spi.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/cpu/cc2538/dev/spi.c b/cpu/cc2538/dev/spi.c index f60792da7..2a8d48d92 100644 --- a/cpu/cc2538/dev/spi.c +++ b/cpu/cc2538/dev/spi.c @@ -91,8 +91,5 @@ spi_init(void) /* Enable the SSI */ REG(SSI0_BASE + SSI_CR1) |= SSI_CR1_SSE; - - /* Clear the RX FIFO */ - SPI_WAITFOREORx(); } /** @} */ From f1ca1b742ce62d1f2187f25233de52d1601aac7a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Mon, 4 Nov 2013 16:59:02 +0100 Subject: [PATCH 2/4] cc2538: spi: Include spi-arch.h before dev/spi.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit spi-arch.h configures dev/spi.h, so it must be #included first. Luckily, this mistake did not have any consequence here, but fix it in order to avoid possible future issues. Signed-off-by: Benoît Thébaudeau --- cpu/cc2538/dev/spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpu/cc2538/dev/spi.c b/cpu/cc2538/dev/spi.c index 2a8d48d92..77a02ceec 100644 --- a/cpu/cc2538/dev/spi.c +++ b/cpu/cc2538/dev/spi.c @@ -35,12 +35,12 @@ */ #include "contiki.h" #include "reg.h" +#include "spi-arch.h" #include "dev/ioc.h" #include "dev/sys-ctrl.h" #include "dev/spi.h" #include "dev/ssi.h" #include "dev/gpio.h" -#include "spi-arch.h" /** * \brief Initialize the SPI bus. From b134e35450f97a946650b7daeb67ea95ab130f29 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Mon, 4 Nov 2013 18:39:52 +0100 Subject: [PATCH 3/4] cc2538: spi: Add format configuration options MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Benoît Thébaudeau --- cpu/cc2538/dev/spi.c | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) diff --git a/cpu/cc2538/dev/spi.c b/cpu/cc2538/dev/spi.c index 77a02ceec..42cf76999 100644 --- a/cpu/cc2538/dev/spi.c +++ b/cpu/cc2538/dev/spi.c @@ -42,6 +42,21 @@ #include "dev/ssi.h" #include "dev/gpio.h" +/* Default: Motorola mode 3 with 8-bit data words */ +#ifndef SPI_CONF_PHASE +#define SPI_CONF_PHASE SSI_CR0_SPH +#endif +#ifndef SPI_CONF_POLARITY +#define SPI_CONF_POLARITY SSI_CR0_SPO +#endif +#ifndef SPI_CONF_DATA_SIZE +#define SPI_CONF_DATA_SIZE 8 +#endif + +#if SPI_CONF_DATA_SIZE < 4 || SPI_CONF_DATA_SIZE > 16 +#error SPI_CONF_DATA_SIZE must be set between 4 and 16 inclusive. +#endif + /** * \brief Initialize the SPI bus. * @@ -51,7 +66,10 @@ * CC2538_SPI_MISO_PORT_NUM CC2538_SPI_MISO_PIN_NUM * CC2538_SPI_SEL_PORT_NUM CC2538_SPI_SEL_PIN_NUM * - * This sets the SPI data width to 8 bits and the mode to Freescale mode 3. + * This sets the mode to Motorola SPI with the following format options: + * SPI_CONF_PHASE: 0 or SSI_CR0_SPH + * SPI_CONF_POLARITY: 0 or SSI_CR0_SPO + * SPI_CONF_DATA_SIZE: 4 to 16 bits */ void spi_init(void) @@ -86,8 +104,8 @@ spi_init(void) /* Configure the clock */ REG(SSI0_BASE + SSI_CPSR) = 2; - /* Put the ssi in motorola SPI mode with 8 bit data */ - REG(SSI0_BASE + SSI_CR0) = SSI_CR0_SPH_M | SSI_CR0_SPO_M | (7); + /* Put the ssi in Motorola SPI mode using the provided format options */ + REG(SSI0_BASE + SSI_CR0) = SPI_CONF_PHASE | SPI_CONF_POLARITY | (SPI_CONF_DATA_SIZE - 1); /* Enable the SSI */ REG(SSI0_BASE + SSI_CR1) |= SSI_CR1_SSE; From e8a8870d1dce4d5c978098715786802f586edf58 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Fri, 15 Nov 2013 15:58:44 +0100 Subject: [PATCH 4/4] cc2538: spi: Add enable and disable functions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This makes it possible to reduce the power consumption when the SPI is unused. Signed-off-by: Benoît Thébaudeau --- cpu/cc2538/dev/spi.c | 17 +++++++++++++++-- cpu/cc2538/spi-arch.h | 15 +++++++++++++++ 2 files changed, 30 insertions(+), 2 deletions(-) diff --git a/cpu/cc2538/dev/spi.c b/cpu/cc2538/dev/spi.c index 42cf76999..191c77a62 100644 --- a/cpu/cc2538/dev/spi.c +++ b/cpu/cc2538/dev/spi.c @@ -74,8 +74,7 @@ void spi_init(void) { - /* Enable the SSI peripheral */ - REG(SYS_CTRL_RCGCSSI) |= 1; + spi_enable(); /* Start by disabling the peripheral before configuring it */ REG(SSI0_BASE + SSI_CR1) = 0; @@ -110,4 +109,18 @@ spi_init(void) /* Enable the SSI */ REG(SSI0_BASE + SSI_CR1) |= SSI_CR1_SSE; } +/*---------------------------------------------------------------------------*/ +void +spi_enable(void) +{ + /* Enable the clock for the SSI peripheral */ + REG(SYS_CTRL_RCGCSSI) |= 1; +} +/*---------------------------------------------------------------------------*/ +void +spi_disable(void) +{ + /* Gate the clock for the SSI peripheral */ + REG(SYS_CTRL_RCGCSSI) &= ~1; +} /** @} */ diff --git a/cpu/cc2538/spi-arch.h b/cpu/cc2538/spi-arch.h index 3bace13d4..85eb058c1 100644 --- a/cpu/cc2538/spi-arch.h +++ b/cpu/cc2538/spi-arch.h @@ -57,6 +57,21 @@ #define SPI_WAITFOREORx() do { \ while(!(REG(SSI0_BASE + SSI_SR) & SSI_SR_RNE)); \ } while (0) +/*---------------------------------------------------------------------------*/ +/** \name Arch-specific SPI functions + * @{ + */ + +/** \brief Enables the SPI peripheral + */ +void spi_enable(void); + +/** \brief Disables the SPI peripheral + * \note Call this function to save power when the SPI is unused. + */ +void spi_disable(void); + +/** @} */ #endif /* SPI_ARCH_H_ */