Commit Graph

4 Commits

Author SHA1 Message Date
Benoît Thébaudeau
ab1491be69 CC2538: Use CMSIS-CORE
Switch to CMSIS-CORE and remove the duplicate code.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2016-11-24 22:30:26 +01:00
Benoît Thébaudeau
92d8f95cba cc2538: Fix GCC 5 warning
Fix the following warning issued by GCC ARM Embedded 5-2015-q4-major:

  ../../cpu/cc2538/dev/udma.c: In function 'udma_init':
  ../../cpu/cc2538/dev/udma.c:59:10: warning: passing argument 1 of 'memset' discards 'volatile' qualifier from pointer target type [-Wdiscarded-array-qualifiers]
     memset(&channel_config, 0, sizeof(channel_config));
            ^
  In file included from <toolchain-path>/arm-none-eabi/include/string.h:10:0,
                   from ../../platform/cc2538dk/./contiki-conf.h:12,
                   from ../../cpu/cc2538/dev/udma.c:38:
  <toolchain-path>/arm-none-eabi/include/string.h:25:7: note: expected 'void *' but argument is of type 'volatile struct channel_ctrl (*)[4]'
   _PTR  _EXFUN(memset,(_PTR, int, size_t));
         ^

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2016-01-09 15:43:20 +01:00
Benoît Thébaudeau
37e73894f1 cc2538: Move SoC data to a dedicated section to save space
Some SoC data requires huge alignments. E.g., the µDMA channel control table has
to be 1024-byte aligned. This table was simply aligned to 1024 bytes in the C
code, which had the following consequences, wasting a lot of RAM:
 - As this table could be placed anywhere in .bss, there could be an alignment
   gap of up to 1023 bytes between the preceding data and this table.
 - The size of this table was also aligned to 1024 bytes, regardless of
   UDMA_CONF_MAX_CHANNEL, making this configuration option supposed to save RAM
   just useless.
 - .bss was also aligned to at least 1024 bytes, creating a huge alignment gap
   between .data and .bss.

Instead of relying on the compiler to force this alignment, and on the linker to
automatically place data, this change places carefully such SoC data in RAM
using the linker script. A dedicated section is created to place such SoC data
requiring huge alignments, and it is put at the beginning of the SRAM in order
to ensure a maximal alignment without any gap. In this way, the alignment of
.bss also remains normal, and the size of this table is not constrained by its
alignment, but only by its contents (i.e. by UDMA_CONF_MAX_CHANNEL).

In the case of the µDMA channel control table, the data is still zeroed by
udma_init() (instead of also being zeroed as part of .bss).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-23 15:06:13 +01:00
George Oikonomou
40f49948e6 New Platform: TI CC2538 Development Kit
This commit adds cpu, platform and example files,
providing support for running Contiki on TI's cc2538 DK
2013-04-06 21:07:31 +01:00