Commit Graph

18 Commits

Author SHA1 Message Date
Benoît Thébaudeau
ab1491be69 CC2538: Use CMSIS-CORE
Switch to CMSIS-CORE and remove the duplicate code.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2016-11-24 22:30:26 +01:00
Benoît Thébaudeau
4a6e19ed38 cc2538: pwm: Automatically disable PM1+ if running
The peripheral core clocks of the PWM timers are gated in PM1+, so these
power modes must be disabled if a PWM timer is running. Use
lpm_register_peripheral() to handle this automatically and dynamically.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2015-12-13 02:39:55 +01:00
AntiCat
d631270af4 cc2538: Add PKA drivers, ECC algorithms and examples 2015-10-18 20:14:17 +02:00
Atis Elsts
2f79810b58 Use ENERGEST_SWITCH to switch between different power modes to improve energest accuracy. 2015-09-04 11:46:00 +02:00
Benoît Thébaudeau
b92a5afcc4 cc2538: ccm: Make it possible to use the interrupt
Using the AES interrupt allows the user process not to waste time
polling for the completion of the operation. This time can be used by
the user process to do something else, or to let the system enter PM0.

Since the system is now free to perform various operations during a
crypto operation, a protection of the crypto resource is added, and PM1+
is prohibited in order not to stall crypto operations.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2015-06-02 21:41:07 +02:00
Ulf Knoblich
d8efa8428c cc2538: Allow for configuration of processor speed 2015-05-19 18:55:55 +02:00
George Oikonomou
602f834caf Merge pull request #472 from ADVANSEE/cc2538-clock-adjust-etimer-poll
cc2538: clock: Fix clock / timer issues with PM1/2
2014-04-13 16:35:17 +01:00
Benoît Thébaudeau
42c287f363 cc2538: lpm: Fix build for LPM_CONF_ENABLE == 0
lpm.c needs to #include lpm.h in order to get the definition of
lpm_periph_permit_pm1_func_t, which made the replacement macros conflict with
the function definitions for the LPM_CONF_ENABLE == 0 case. This change fixes
this issue by #if-ing out the code in lpm.c in that case. Also, the replacement
macro for lpm_register_peripheral() was missing in that case, which is fixed
here.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2014-01-28 20:21:06 +01:00
Benoît Thébaudeau
d86b8275ec cc2538: clock: Fix time drift occurring with PM1/2
The clock adjustments made when waking up from PM1/2 were very inaccurate. If
relying on ContikiMAC's rtimer to sleep, this led to Contiki's software clock
time, seconds and etimers to be 2.5 s slower after each min, i.e. 1 hour slower
after each day, which is a show stopper issue for most real-life applications.

This was caused by a lack of accuracy in several pieces of code during sleep
entry and wake-up:
 - It was difficult to synchronize the calls to RTIMER_NOW() before and after
   sleep with the deactivation and activation of the SysTick peripheral caused
   by PM1/2. This caused an inaccuracy in the corrective number of ticks passed
   to clock_adjust().
 - The value passed to clock_adjust() was truncated from an rtimer_clock_t
   value, but the accumulated error caused by these truncated bits was ignored.
 - The SysTick peripheral had to be stopped during the call to clock_adjust().

Rather than creating even more complicated clock adjustment mechanisms that
would probably still have mixed results as to accuracy, this change simply uses
the Sleep Timer counter as a base value for Contiki's clock and seconds
counters. The tick from the Systick peripheral is still used as the interrupt
source to update Contiki's clocks and timers. When running, the SysTick
peripheral and the Sleep Timer are synchronized, so combining both is not an
issue, and this allows not to alter the rtimer interrupt mechanism using the
Sleep Timer. The purpose of the Sleep Timer is to be an RTC, so it is the
perfect fit for the clock module, all the more it can not be disturbed by PM1/2.
If the 32-kHz XOSC is used, the Sleep Timer is also very accurate. If the
32-kHZ RCOSC is used, it is calibrated from the 32-MHz XOSC, so it is also
accurate, and the 32753-Hz vs. 32768-Hz systematic error in that case is
negligible, all the more one would use the 32-kHz XOSC for better accuracy.

Besides fixing this time drift issue, this change has several benefits:
 - clock_time(), clock_seconds() and RTIMER_NOW() start synchronized, and they
   change at the same source pace.
 - If clock_set_seconds() is called, then clock_seconds() indicates one more
   second almost exactly one second later, then exactly each second. Before this
   change, clock_seconds() was not synchronized with clock_set_seconds(), so the
   value returned by the former could be incremented immediately after the call
   to the latter in some cases.
 - The code tied to the clock module is simpler and more robust.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-06 13:04:30 +01:00
Benoît Thébaudeau
5261bb861d cc2538: lpm: Fix RTIMER_NOW() upon wake-up
When returning from PM1/2, the sleep timer value (used by RTIMER_NOW()) is not
up-to-date until a positive edge on the 32-kHz clock has been detected after the
system clock restarted. To ensure an updated value is read, wait for a positive
transition on the 32-kHz clock by polling the SYS_CTRL_CLOCK_STA.SYNC_32K bit,
before reading the sleep timer value.

Because of this RTIMER_NOW() fixup, lpm_exit() has to be called at the very
beginning of ISRs waking up the SoC. This also ensures that all clocks and
timers are enabled at the correct frequency and updated before using them
following wake-up.

Without this fix, etimers could sometimes (randomly, depending on timings)
become ultra slow (observed from 10x to 40x slower than normal) if the system
exited PM1/2 very often. This issue occurred more often with PM1.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-05 20:23:29 +01:00
Benoît Thébaudeau
f149197aa8 cc2538: lpm: Speed up the transition to the 32-MHz XOSC after wake-up
As recommended by the CC2538 User's Guide, set SYS_CTRL_CLOCK_CTRL.OSC_PD to 0
before asserting WFI, and set it to 1 after the system clock is sourced from the
32-MHz XOSC following wake-up. This allows to automatically start both
oscillators upon wake-up in order to partially hide the 32-MHz XOSC startup time
by the 16-MHz RCOSC startup time.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-05 20:23:29 +01:00
Benoît Thébaudeau
13006e1c73 cc2538: lpm: Let system clock transitions complete before further changes
As a matter of precaution, always make sure that pending system clock
transitions are complete before requesting a new change of the system clock
source.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-05 20:23:29 +01:00
Benoît Thébaudeau
8514a91ea9 cc2538: lpm: Fix energest context when aborting lpm_enter()
In one of the abort cases in lpm_enter(), the energest context has previously
been set to LPM, so the abort code needs to set it back to CPU.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-05 20:23:29 +01:00
Benoît Thébaudeau
035a30602b cc2538: lpm: Make periph_permit_pm1_funcs static
periph_permit_pm1_funcs[] is a private member of lpm.c, so define it as static.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-11-18 11:57:59 +01:00
Benoît Thébaudeau
b8b54a033c cc2538: uart: Fix crippled output occurring upon lpm_enter()
lpm_enter() must not enter PM1+ if the UART TX FIFO is not empty. Otherwise, the
UART clock gets disabled, and its TX is broken.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-11-15 17:24:26 +01:00
Benoît Thébaudeau
0692ee251d cc2538: usb: Use the new LPM peripheral registration
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-11-15 17:14:45 +01:00
Benoît Thébaudeau
d35732505b cc2538: lpm: Add registration mechanism for peripherals
Some peripherals have their clocks automatically gated in PM1+ modes, so they
cannot operate. This new mechanism gives peripherals a way to prohibit PM1+
modes so that they can properly complete their current operations before
entering PM1+.

This mechanism is implemented with peripheral functions registered to the LPM
module. These functions return whether the associated peripheral permits or not
PM1+ modes. They are called by the LPM module each time PM1+ might be possible.
If any of the peripherals wants to block PM1+, then the system is only dropped
to PM0.

Partly from: George Oikonomou
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-11-15 17:09:22 +01:00
George Oikonomou
40f49948e6 New Platform: TI CC2538 Development Kit
This commit adds cpu, platform and example files,
providing support for running Contiki on TI's cc2538 DK
2013-04-06 21:07:31 +01:00