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b92a5afcc4
Using the AES interrupt allows the user process not to waste time polling for the completion of the operation. This time can be used by the user process to do something else, or to let the system enter PM0. Since the system is now free to perform various operations during a crypto operation, a protection of the crypto resource is added, and PM1+ is prohibited in order not to stall crypto operations. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
320 lines
13 KiB
C
320 lines
13 KiB
C
/*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* \addtogroup cc2538
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* @{
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*
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* \file
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* Startup code for the cc2538 chip, to be used when building with gcc
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*/
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#include "contiki.h"
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#include "reg.h"
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#include "flash-cca.h"
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#include "sys-ctrl.h"
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#include "rom-util.h"
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#include <stdint.h>
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/*---------------------------------------------------------------------------*/
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extern int main(void);
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/*---------------------------------------------------------------------------*/
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#define WEAK_ALIAS(x) __attribute__ ((weak, alias(#x)))
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/*---------------------------------------------------------------------------*/
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/* System handlers provided here */
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void reset_handler(void);
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void nmi_handler(void);
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void default_handler(void);
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/* System Handler and ISR prototypes implemented elsewhere */
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void clock_isr(void); /* SysTick Handler */
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void gpio_port_a_isr(void);
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void gpio_port_b_isr(void);
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void gpio_port_c_isr(void);
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void gpio_port_d_isr(void);
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void rtimer_isr(void);
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void cc2538_rf_rx_tx_isr(void);
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void cc2538_rf_err_isr(void);
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void udma_isr(void);
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void udma_err_isr(void);
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void usb_isr(void) WEAK_ALIAS(default_handler);
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void uart0_isr(void) WEAK_ALIAS(default_handler);
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void uart1_isr(void) WEAK_ALIAS(default_handler);
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void crypto_isr(void);
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/* Boot Loader Backdoor selection */
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#if FLASH_CCA_CONF_BOOTLDR_BACKDOOR
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/* Backdoor enabled */
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#if FLASH_CCA_CONF_BOOTLDR_BACKDOOR_ACTIVE_HIGH
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#define FLASH_CCA_BOOTLDR_CFG_ACTIVE_LEVEL FLASH_CCA_BOOTLDR_CFG_ACTIVE_HIGH
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#else
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#define FLASH_CCA_BOOTLDR_CFG_ACTIVE_LEVEL 0
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#endif
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#if ((FLASH_CCA_CONF_BOOTLDR_BACKDOOR_PORT_A_PIN < 0) || (FLASH_CCA_CONF_BOOTLDR_BACKDOOR_PORT_A_PIN > 7))
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#error Invalid boot loader backdoor pin. Please set FLASH_CCA_CONF_BOOTLDR_BACKDOOR_PORT_A_PIN between 0 and 7 (indicating PA0 - PA7).
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#endif
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#define FLASH_CCA_BOOTLDR_CFG (FLASH_CCA_BOOTLDR_CFG_ENABLE \
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| FLASH_CCA_BOOTLDR_CFG_ACTIVE_LEVEL \
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| (FLASH_CCA_CONF_BOOTLDR_BACKDOOR_PORT_A_PIN << FLASH_CCA_BOOTLDR_CFG_PORT_A_PIN_S))
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#else
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#define FLASH_CCA_BOOTLDR_CFG FLASH_CCA_BOOTLDR_CFG_DISABLE
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#endif
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/*---------------------------------------------------------------------------*/
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/* Allocate stack space */
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static unsigned long stack[512] __attribute__ ((section(".stack")));
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/*---------------------------------------------------------------------------*/
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/* Linker construct indicating .text section location */
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extern uint8_t _text[0];
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/*---------------------------------------------------------------------------*/
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__attribute__ ((section(".flashcca"), used))
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const flash_cca_lock_page_t __cca = {
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FLASH_CCA_BOOTLDR_CFG, /* Boot loader backdoor configuration */
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FLASH_CCA_IMAGE_VALID, /* Image valid */
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&_text, /* Vector table located at the start of .text */
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/* Unlock all pages and debug */
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{ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
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0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
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0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
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0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
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};
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/*---------------------------------------------------------------------------*/
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__attribute__ ((section(".vectors"), used))
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void(*const vectors[])(void) =
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{
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(void (*)(void))((unsigned long)stack + sizeof(stack)), /* Stack pointer */
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reset_handler, /* Reset handler */
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nmi_handler, /* The NMI handler */
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default_handler, /* The hard fault handler */
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default_handler, /* 4 The MPU fault handler */
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default_handler, /* 5 The bus fault handler */
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default_handler, /* 6 The usage fault handler */
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0, /* 7 Reserved */
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0, /* 8 Reserved */
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0, /* 9 Reserved */
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0, /* 10 Reserved */
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default_handler, /* 11 SVCall handler */
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default_handler, /* 12 Debug monitor handler */
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0, /* 13 Reserved */
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default_handler, /* 14 The PendSV handler */
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clock_isr, /* 15 The SysTick handler */
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gpio_port_a_isr, /* 16 GPIO Port A */
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gpio_port_b_isr, /* 17 GPIO Port B */
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gpio_port_c_isr, /* 18 GPIO Port C */
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gpio_port_d_isr, /* 19 GPIO Port D */
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0, /* 20 none */
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uart0_isr, /* 21 UART0 Rx and Tx */
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uart1_isr, /* 22 UART1 Rx and Tx */
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default_handler, /* 23 SSI0 Rx and Tx */
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default_handler, /* 24 I2C Master and Slave */
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0, /* 25 Reserved */
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0, /* 26 Reserved */
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0, /* 27 Reserved */
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0, /* 28 Reserved */
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0, /* 29 Reserved */
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default_handler, /* 30 ADC Sequence 0 */
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0, /* 31 Reserved */
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0, /* 32 Reserved */
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0, /* 33 Reserved */
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default_handler, /* 34 Watchdog timer, timer 0 */
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default_handler, /* 35 Timer 0 subtimer A */
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default_handler, /* 36 Timer 0 subtimer B */
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default_handler, /* 37 Timer 1 subtimer A */
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default_handler, /* 38 Timer 1 subtimer B */
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default_handler, /* 39 Timer 2 subtimer A */
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default_handler, /* 40 Timer 2 subtimer B */
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default_handler, /* 41 Analog Comparator 0 */
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default_handler, /* 42 RFCore Rx/Tx (Alternate) */
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default_handler, /* 43 RFCore Error (Alternate) */
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default_handler, /* 44 System Control */
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default_handler, /* 45 FLASH Control */
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default_handler, /* 46 AES (Alternate) */
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default_handler, /* 47 PKA (Alternate) */
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default_handler, /* 48 SM Timer (Alternate) */
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default_handler, /* 49 MacTimer (Alternate) */
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default_handler, /* 50 SSI1 Rx and Tx */
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default_handler, /* 51 Timer 3 subtimer A */
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default_handler, /* 52 Timer 3 subtimer B */
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0, /* 53 Reserved */
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0, /* 54 Reserved */
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0, /* 55 Reserved */
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0, /* 56 Reserved */
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0, /* 57 Reserved */
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0, /* 58 Reserved */
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0, /* 59 Reserved */
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0, /* 60 Reserved */
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0, /* 61 Reserved */
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udma_isr, /* 62 uDMA */
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udma_err_isr, /* 63 uDMA Error */
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0, /* 64 64-155 are not in use */
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0, /* 65 */
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0, /* 66 */
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0, /* 67 */
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0, /* 68 */
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0, /* 69 */
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0, /* 146 */
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0, /* 149 */
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0, /* 150 */
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0, /* 151 */
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0, /* 152 */
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0, /* 153 */
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0, /* 154 */
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0, /* 155 */
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usb_isr, /* 156 USB */
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cc2538_rf_rx_tx_isr, /* 157 RFCORE RX/TX */
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cc2538_rf_err_isr, /* 158 RFCORE Error */
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crypto_isr, /* 159 AES */
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default_handler, /* 160 PKA */
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rtimer_isr, /* 161 SM Timer */
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default_handler, /* 162 MACTimer */
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};
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/*---------------------------------------------------------------------------*/
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/* Linker constructs indicating .data and .bss segment locations */
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extern uint8_t _ldata;
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extern uint8_t _data;
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extern uint8_t _edata;
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extern uint8_t _bss;
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extern uint8_t _ebss;
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/*---------------------------------------------------------------------------*/
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/* Weak interrupt handlers. */
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void
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nmi_handler(void)
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{
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reset_handler();
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while(1);
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}
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/*---------------------------------------------------------------------------*/
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void
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default_handler(void)
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{
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while(1);
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}
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/*---------------------------------------------------------------------------*/
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void
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reset_handler(void)
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{
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REG(SYS_CTRL_EMUOVR) = 0xFF;
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/* Copy the data segment initializers from flash to SRAM. */
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rom_util_memcpy(&_data, &_ldata, &_edata - &_data);
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/* Zero-fill the bss segment. */
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rom_util_memset(&_bss, 0, &_ebss - &_bss);
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/* call the application's entry point. */
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main();
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/* End here if main () returns */
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while(1);
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}
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/*---------------------------------------------------------------------------*/
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/** @} */
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