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This patch extends the protection domain framework with a third plugin that is a hybrid of the previous two. The hardware task switching mechanism has a strictly-defined format for TSS data structures that causes more space to be consumed than would otherwise be required. This patch defines a smaller data structure that is allocated for each protection domain, only requiring 32 bytes instead of 128 bytes. It uses the same multi-segment memory layout as the TSS-based plugin and leaves paging disabled. However, it uses a similar mechanism as the paging plugin to perform system call dispatches and returns. For additional information, please refer to cpu/x86/mm/README.md.
139 lines
5.1 KiB
C
139 lines
5.1 KiB
C
/*
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* Copyright (C) 2015-2016, Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef CPU_X86_MM_GDT_LAYOUT_H_
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#define CPU_X86_MM_GDT_LAYOUT_H_
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#include "prot-domains.h"
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#if X86_CONF_PROT_DOMAINS == X86_CONF_PROT_DOMAINS__PAGING
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/**
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* Number of fixed GDT descriptors. Additional descriptors may be defined
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* outside of gdt.c.
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*/
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#define GDT_NUM_FIXED_DESC 7
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#elif X86_CONF_PROT_DOMAINS_MULTI_SEG
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#define GDT_NUM_FIXED_DESC 11
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#else
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#define GDT_NUM_FIXED_DESC 3
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#endif
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#define GDT_IDX_NULL 0
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/**
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* Flat code segment, used at boot and also for the rest of the system's
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* runtime when protection domains are disabled
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*/
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#define GDT_IDX_CODE_FLAT 1
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/**
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* Flat data segment, used at boot and also for the rest of the system's
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* runtime when protection domains are disabled
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*/
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#define GDT_IDX_DATA_FLAT 2
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#if X86_CONF_PROT_DOMAINS != X86_CONF_PROT_DOMAINS__NONE
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/** Default (post-boot) code segment */
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#define GDT_IDX_CODE 3
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/**
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* Same bounds and permissions as default code segment, but at the interrupt
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* handler privilege level
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*/
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#define GDT_IDX_CODE_INT 4
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/** Stack segment for interrupt handlers */
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#define GDT_IDX_STK_INT 5
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#if X86_CONF_PROT_DOMAINS == X86_CONF_PROT_DOMAINS__PAGING
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#define GDT_IDX_CODE_EXC GDT_IDX_CODE_FLAT
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/** Default data segment used by code at all privilege levels */
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#define GDT_IDX_DATA 6
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#define GDT_IDX_STK GDT_IDX_DATA
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#define GDT_IDX_STK_EXC GDT_IDX_DATA_FLAT
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#else
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/**
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* Same bounds and permissions as default code segment, but at the exception
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* handler privilege level
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*/
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#define GDT_IDX_CODE_EXC 6
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/** R/W kernel data descriptor used during boot stage 1 */
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#define GDT_IDX_DATA_KERN_EXC 7
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/** Default data segment used by code at all privilege levels */
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#define GDT_IDX_DATA 8
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/**
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* Default stack segment, which overlaps with the beginning of the default data
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* segment
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*/
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#define GDT_IDX_STK 9
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/** Stack segment for exception handlers */
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#define GDT_IDX_STK_EXC 10
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#if X86_CONF_PROT_DOMAINS == X86_CONF_PROT_DOMAINS__TSS
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#define GDT_IDX_TSS(dom_id) (GDT_NUM_FIXED_DESC + (2 * (dom_id)))
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#define GDT_IDX_LDT(dom_id) (GDT_NUM_FIXED_DESC + (2 * (dom_id)) + 1)
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#else
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#define GDT_IDX_LDT(dom_id) (GDT_NUM_FIXED_DESC + (dom_id))
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#endif
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#endif
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#else
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#define GDT_IDX_CODE GDT_IDX_CODE_FLAT
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#define GDT_IDX_CODE_INT GDT_IDX_CODE_FLAT
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#define GDT_IDX_CODE_EXC GDT_IDX_CODE_FLAT
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#define GDT_IDX_DATA GDT_IDX_DATA_FLAT
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#define GDT_IDX_STK GDT_IDX_DATA_FLAT
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#define GDT_IDX_STK_INT GDT_IDX_DATA_FLAT
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#define GDT_IDX_STK_EXC GDT_IDX_DATA_FLAT
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#endif
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#define GDT_SEL(idx, rpl) (((idx) << 3) | (rpl))
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#define DT_SEL_GET_IDX(sel) ((sel) >> 3)
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#define DT_SEL_GET_RPL(sel) ((sel) & 3)
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#define GDT_SEL_NULL GDT_SEL(GDT_IDX_NULL, 0)
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#define GDT_SEL_CODE_FLAT GDT_SEL(GDT_IDX_CODE_FLAT, PRIV_LVL_EXC)
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#define GDT_SEL_DATA_FLAT GDT_SEL(GDT_IDX_DATA_FLAT, PRIV_LVL_EXC)
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#define GDT_SEL_CODE GDT_SEL(GDT_IDX_CODE, PRIV_LVL_USER)
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#define GDT_SEL_CODE_INT GDT_SEL(GDT_IDX_CODE_INT, PRIV_LVL_INT)
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#define GDT_SEL_CODE_EXC GDT_SEL(GDT_IDX_CODE_EXC, PRIV_LVL_EXC)
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#define GDT_SEL_DATA GDT_SEL(GDT_IDX_DATA, PRIV_LVL_EXC)
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#define GDT_SEL_DATA_KERN_EXC GDT_SEL(GDT_IDX_DATA_KERN_EXC, PRIV_LVL_EXC)
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#define GDT_SEL_STK GDT_SEL(GDT_IDX_STK, PRIV_LVL_USER)
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#define GDT_SEL_STK_INT GDT_SEL(GDT_IDX_STK_INT, PRIV_LVL_INT)
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#define GDT_SEL_STK_EXC GDT_SEL(GDT_IDX_STK_EXC, PRIV_LVL_EXC)
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#define GDT_SEL_TSS(dom_id) GDT_SEL(GDT_IDX_TSS(dom_id), PRIV_LVL_USER)
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#define GDT_SEL_LDT(dom_id) GDT_SEL(GDT_IDX_LDT(dom_id), PRIV_LVL_USER)
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#endif /* CPU_X86_MM_GDT_LAYOUT_H_ */
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