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e0aefd11d9
This patch extends the protection domain framework with a third plugin that is a hybrid of the previous two. The hardware task switching mechanism has a strictly-defined format for TSS data structures that causes more space to be consumed than would otherwise be required. This patch defines a smaller data structure that is allocated for each protection domain, only requiring 32 bytes instead of 128 bytes. It uses the same multi-segment memory layout as the TSS-based plugin and leaves paging disabled. However, it uses a similar mechanism as the paging plugin to perform system call dispatches and returns. For additional information, please refer to cpu/x86/mm/README.md.
84 lines
3.2 KiB
C
84 lines
3.2 KiB
C
/*
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* Copyright (C) 2015, Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "gdt.h"
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#include "helpers.h"
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#include "multi-segment.h"
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#include "prot-domains.h"
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/*---------------------------------------------------------------------------*/
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void
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prot_domains_reg(dom_client_data_t ATTR_KERN_ADDR_SPACE *dcd,
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uintptr_t mmio, size_t mmio_sz,
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uintptr_t meta, size_t meta_sz,
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bool pio)
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{
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volatile dom_kern_data_t ATTR_KERN_ADDR_SPACE *dkd;
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dom_id_t dom_id;
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KERN_READL(dom_id, dcd->dom_id);
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if(PROT_DOMAINS_ACTUAL_CNT <= dom_id) {
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halt();
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}
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dkd = prot_domains_kern_data + dom_id;
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prot_domains_reg_multi_seg(dkd, mmio, mmio_sz, meta, meta_sz);
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KERN_WRITEL(dkd->flags, pio ? PROT_DOMAINS_FLAG_PIO : 0);
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}
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/*---------------------------------------------------------------------------*/
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static inline void __attribute__((always_inline))
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prot_domains_switch(dom_id_t from_id, dom_id_t to_id,
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interrupt_stack_t *intr_stk)
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{
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__asm__ __volatile__ (
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"lldt %[_ldt_]\n\t"
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"mov %[_meta_seg_], %%eax\n\t"
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"lsl %%eax, %%ecx\n\t"
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"jz 1f\n\t" /* ZF will only be set if the segment descriptor is valid. */
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"xor %%eax, %%eax\n\t" /* Nullify metadata selector */
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"1: mov %%eax, %%" SEG_META "s\n\t"
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"mov %[_kern_seg_], %%eax\n\t"
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"mov %%eax, %%" SEG_KERN "s\n\t"
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:
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: [_ldt_] "r" ((uint16_t)GDT_SEL_LDT(to_id)),
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[_meta_seg_] "i" (LDT_SEL_META),
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[_kern_seg_] "i" (LDT_SEL_KERN)
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: "cc", "eax", "ecx"
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);
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}
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/*---------------------------------------------------------------------------*/
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/* Enable inter-procedural optimization with procedures in the following file:
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*/
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#include "syscalls-int.c"
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