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2912559061
This patch replaces the pinmux APIs that require users to look up an arbitrary function number for the desired function of each pin. The replacement API functions have intuitive names and permit users to pass board-level IO port numbers. The API functions internally convert those to CPU-level port numbers when necessary. Furthermore, when configuring a pin to be a digital input or output, those API functions also perform the corresponding configuration operation on the CPU-level GPIO port. The revised APIs halt when users attempt to configure a currently-unsupported GPIO, specifically those in the GPIO_SUS port range and those implemented on the expander chip EXP2. This also means that such ports are left unconfigured during initialization, whereas the pinmuxing for them was setup by the old implementation.
84 lines
3.2 KiB
C
84 lines
3.2 KiB
C
/*
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* Copyright (C) 2015, Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef CPU_X86_DRIVERS_GALILEO_PINMUX_H_
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#define CPU_X86_DRIVERS_GALILEO_PINMUX_H_
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#include <stdint.h>
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typedef enum galileo_pin_group {
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GALILEO_PIN_GRP_ANALOG,
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GALILEO_PIN_GRP_DIGITAL
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} galileo_pin_group_t;
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#define GALILEO_NUM_ANALOG_PINS 6
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#define GALILEO_NUM_DIGITAL_PINS 14
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#define GALILEO_NUM_PINS (GALILEO_NUM_ANALOG_PINS + GALILEO_NUM_DIGITAL_PINS)
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int galileo_pinmux_initialize(void);
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/**
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* \brief Set the indicated pin to be a digital input.
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* \param grp Indicates whether the pin is in the analog or digital group.
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* \param pin Index of pin within group.
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*/
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void galileo_pinmux_select_din(galileo_pin_group_t grp, unsigned pin);
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/**
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* \brief Set the indicated pin to be a digital output.
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*/
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void galileo_pinmux_select_dout(galileo_pin_group_t grp, unsigned pin);
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/**
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* \brief Set the indicated pin to be a PWM pin. Only a subset of the pins
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* support PWM output. This implicitly operates on the digital pin
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* group.
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*/
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void galileo_pinmux_select_pwm(unsigned pin);
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/**
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* \brief Connect the indicated pin to a serial port. This implicitly operates
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* on the digital pin group. Galileo Gen. 2 supports UART0 on pins 0 and
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* 1 and UART1 on pins 2 and 3.
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*/
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void galileo_pinmux_select_serial(unsigned pin);
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/**
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* \brief Connect analog pins 4 (SDA) and 5 (SCL) to I2C.
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*/
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void galileo_pinmux_select_i2c(void);
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/**
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* \brief Connect digital pins 11 (MOSI), 12 (MISO), and 13 (CLK) to SPI.
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*/
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void galileo_pinmux_select_spi(void);
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/**
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* \brief Set the indicated pin to be an ADC input. This implicitly operates
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* on the analog pin group.
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*/
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void galileo_pinmux_select_analog(unsigned pin);
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#endif /* CPU_X86_DRIVERS_GALILEO_PINMUX_H_ */
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