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81 lines
2.6 KiB
C
81 lines
2.6 KiB
C
/*
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* Copyright (c) 2009, Swedish Institute of Computer Science
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*
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*/
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/**
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* \file
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* SD driver implementation using SPI.
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* \author
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* Nicolas Tsiftes <nvt@sics.se>
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*/
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#ifndef SD_ARCH_H
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#define SD_ARCH_H
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#include "msb430-uart1.h"
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#ifndef U1IFG
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#define U1IFG IFG2
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#endif /* U1IFG */
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#define MS_DELAY(x) clock_delay(354 * (x))
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/* Machine-dependent macros. */
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#define LOCK_SPI() do { \
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if(!uart_lock(UART_MODE_SPI)) {\
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return 0; \
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} \
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} while(0)
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#define UNLOCK_SPI() do { \
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uart_unlock(UART_MODE_SPI); \
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} while(0)
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#define SD_CONNECTED() !(P2IN & 0x40)
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#define LOWER_CS() (P5OUT &= ~0x01)
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#define RAISE_CS() do { \
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UART_WAIT_TXDONE(); \
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P5OUT |= 0x01; \
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UART_TX = SPI_IDLE; \
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UART_WAIT_TXDONE(); \
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} while(0)
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/* Configuration parameters. */
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#define SD_TRANSACTION_ATTEMPTS 512
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#define SD_READ_RESPONSE_ATTEMPTS 8
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#define SD_READ_BLOCK_ATTEMPTS 2
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int sd_arch_init(void);
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void sd_arch_spi_write(int c);
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void sd_arch_spi_write_block(uint8_t *bytes, int amount);
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unsigned sd_arch_spi_read(void);
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#endif /* !SD_ARCH_H */
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