2018-11-19 18:06:19 +00:00
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;================================
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;================================
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; mockingboard interrupt handler
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;================================
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;================================
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; On Apple II/6502 the interrupt handler jumps to address in 0xfffe
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; This is in the ROM, which saves the registers
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; on older IIe it saved A to $45 (which could mess with DISK II)
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; newer IIe doesn't do that.
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; It then calculates if it is a BRK or not (which trashes A)
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; Then it sets up the stack like an interrupt and calls 0x3fe
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TIME_OFFSET EQU 13
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interrupt_handler:
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; pha ; save A ; 3
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; A is saved in $45 by firmware
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txa
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pha ; save X
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tya
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pha ; save Y
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; inc $0404 ; debug (flashes char onscreen)
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bit $C404 ; clear 6522 interrupt by reading T1C-L ; 4
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lda DONE_PLAYING ; 3
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beq mb_play_music ; if song done, don't play music ; 3/2nt
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jmp check_keyboard ; 3
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;============
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; 13
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mb_play_music:
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;======================================
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; Write frames to Mockingboard
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;======================================
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; actually plays frame loaded at end of
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; last interrupt, so 20ms behind?
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mb_write_frame:
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ldx #0 ; set up reg count ; 2
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;============
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; 2
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;==================================
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; loop through the 14 registers
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; reading the value, then write out
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;==================================
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; inlined "write_ay_both" to save up to 156 (12*13) cycles
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; unrolled
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mb_write_loop:
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lda REGISTER_DUMP,X ; load register value ; 4
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cmp REGISTER_OLD,X ; compare with old values ; 4
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beq mb_no_write ; 3/2nt
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;=============
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; typ 11
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; special case R13. If it is 0xff, then don't update
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; otherwise might spuriously reset the envelope settings
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cpx #13 ; 2
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bne mb_not_13 ; 3/2nt
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cmp #$ff ; 2
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beq mb_skip_13 ; 3/2nt
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;============
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; typ 5
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mb_not_13:
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; address
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stx MOCK_6522_ORA1 ; put address on PA1 ; 4
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lda #MOCK_AY_LATCH_ADDR ; latch_address for PB1 ; 2
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sta MOCK_6522_ORB1 ; latch_address on PB1 ; 4
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_ORB1 ; 4
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; value
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lda REGISTER_DUMP,X ; load register value ; 4
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sta MOCK_6522_ORA1 ; put value on PA1 ; 4
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lda #MOCK_AY_WRITE ; ; 2
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sta MOCK_6522_ORB1 ; write on PB1 ; 4
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_ORB1 ; 4
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2018-11-20 17:21:01 +00:00
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2018-11-19 18:06:19 +00:00
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mb_no_write:
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inx ; point to next register ; 2
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cpx #14 ; if 14 we're done ; 2
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bmi mb_write_loop ; otherwise, loop ; 3/2nt
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;============
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; 7
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mb_skip_13:
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;=====================================
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; Copy registers to old
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;=====================================
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ldx #13 ; 2
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mb_reg_copy:
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lda REGISTER_DUMP,X ; load register value ; 4
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sta REGISTER_OLD,X ; compare with old values ; 4
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dex ; 2
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bpl mb_reg_copy ; 2nt/3
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;=============
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; 171
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2018-11-20 17:21:01 +00:00
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;======================================
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; Write frames to Mockingboard
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;======================================
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; actually plays frame loaded at end of
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; last interrupt, so 20ms behind?
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mb_write_frame2:
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ldx #0 ; set up reg count ; 2
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;============
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; 2
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mb_write_loop2:
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lda REGISTER_DUMP2,X ; load register value ; 4
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cmp REGISTER_OLD2,X ; compare with old values ; 4
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beq mb_no_write2 ; 3/2nt
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;=============
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; typ 11
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; special case R13. If it is 0xff, then don't update
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; otherwise might spuriously reset the envelope settings
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cpx #13 ; 2
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bne mb_not_132 ; 3/2nt
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cmp #$ff ; 2
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beq mb_skip_132 ; 3/2nt
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;============
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; typ 5
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mb_not_132:
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; address
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stx MOCK_6522_ORA2 ; put address on PA2 ; 4
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lda #MOCK_AY_LATCH_ADDR ; latch_address for PB1 ; 2
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sta MOCK_6522_ORB2 ; latch_address on PB2 ; 4
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_ORB2 ; 4
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; value
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lda REGISTER_DUMP2,X ; load register value ; 4
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sta MOCK_6522_ORA2 ; put value on PA2 ; 4
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lda #MOCK_AY_WRITE ; ; 2
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sta MOCK_6522_ORB2 ; write on PB2 ; 4
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_ORB2 ; 4
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mb_no_write2:
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inx ; point to next register ; 2
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cpx #14 ; if 14 we're done ; 2
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bmi mb_write_loop2 ; otherwise, loop ; 3/2nt
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;============
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; 7
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mb_skip_132:
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;=====================================
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; Copy registers to old
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;=====================================
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ldx #13 ; 2
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mb_reg_copy2:
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lda REGISTER_DUMP2,X ; load register value ; 4
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sta REGISTER_OLD2,X ; compare with old values ; 4
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dex ; 2
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bpl mb_reg_copy2 ; 2nt/3
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;=============
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; 171
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2018-11-19 18:06:19 +00:00
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;===================================
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; Load all 14 registers in advance
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;===================================
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; note, assuming not cross page boundary, not any slower
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; then loading from zero page?
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mb_load_values:
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ldx #0 ; set up reg count ; 2
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ldy MB_CHUNK_OFFSET ; get chunk offset ; 3
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;=============
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; 5
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mb_load_loop:
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lda (INL),y ; load register value ; 5
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sta REGISTER_DUMP,X ; 4
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2018-11-20 17:21:01 +00:00
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lda (INL2),y
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sta REGISTER_DUMP2,X
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2018-11-19 18:06:19 +00:00
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;============
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; 9
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;====================
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; point to next page
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;====================
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clc ; point to next interleaved ; 2
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lda INH ; page by adding CHUNKSIZE (3/1); 3
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adc CHUNKSIZE ; 3
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sta INH ; 3
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2018-11-20 17:21:01 +00:00
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clc
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lda INH2
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adc CHUNKSIZE
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sta INH2
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2018-11-19 18:06:19 +00:00
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inx ; point to next register ; 2
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cpx #14 ; if 14 we're done ; 2
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bmi mb_load_loop ; otherwise, loop ; 3/2nt
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;============
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; 18
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;=========================================
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; if A_COARSE_TONE is $ff then we are done
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lda A_COARSE_TONE ; 3
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bpl mb_not_done ; 3/2nt
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lda #1 ; set done playing ; 2
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jmp quiet_exit ; 3
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;===========
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; typ 6
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mb_not_done:
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;==============================================
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; incremement offset. If 0 move to next chunk
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;==============================================
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increment_offset:
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inc MB_CHUNK_OFFSET ; increment offset ; 5
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bne back_to_first_reg ; if not zero, done ; 3/2nt
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;=====================
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; move to next state
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;=====================
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clc
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rol DECODER_STATE ; next state ; 5
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; 20 -> 40 -> 80 -> c+00
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bcs wraparound_to_a ; 3/2nt
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bit DECODER_STATE ;bit7->N bit6->V
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bvs back_to_first_reg ; do nothing on B ; 3/2nt
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start_c:
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lda #1
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sta CHUNKSIZE
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; setup next three chunks of song
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lda #1 ; start decompressing
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sta DECOMPRESS_TIME ; outside of handler
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jmp back_to_first_reg
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wraparound_to_a:
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lda #$3
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sta CHUNKSIZE
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lda #$20
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sta DECODER_STATE
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sta COPY_TIME ; start copying
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2018-11-20 15:33:36 +00:00
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lda DECOMPRESS_TIME ; Trouble if decompressing
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beq blah ; takes too long?
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2018-11-19 18:06:19 +00:00
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lda #1
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sta DECODE_ERROR
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blah:
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;==============================
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; After 14th reg, reset back to
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; read R0 data
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;==============================
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back_to_first_reg:
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lda #0 ; 2
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bit DECODER_STATE ; 3
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bmi back_to_first_reg_c ; 2nt/3
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bvc back_to_first_reg_a ; 2nt/3
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back_to_first_reg_b:
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lda #$1 ; offset by 1
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back_to_first_reg_a:
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clc ; 2
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2018-11-20 17:21:01 +00:00
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adc #>UNPACK_BUFFER1 ; in proper chunk 1 or 2; 2
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sta INH ; update r0 pointer ; 3
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sec
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sbc #>UNPACK_BUFFER1
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clc
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adc #>UNPACK_BUFFER2
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sta INH2
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2018-11-19 18:06:19 +00:00
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jmp update_r0_pointer ; 3
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back_to_first_reg_c:
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2018-11-20 17:21:01 +00:00
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lda #>(UNPACK_BUFFER1+$2A00) ; in linear C area ; 2
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sta INH ; update r0 pointer ; 3
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lda #>(UNPACK_BUFFER2+$2A00) ; in linear C area ; 2
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sta INH2 ; update r0 pointer ; 3
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2018-11-19 18:06:19 +00:00
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update_r0_pointer:
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2018-11-20 17:21:01 +00:00
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2018-11-19 18:06:19 +00:00
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;=================================
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; Finally done with this interrupt
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;=================================
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done_interrupt:
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;=====================
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; Update time counter
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;=====================
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update_time:
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inc FRAME_COUNT ; 5
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lda FRAME_COUNT ; 3
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cmp #50 ; 3
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bne done_time ; 3/2nt
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lda #$0 ; 2
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sta FRAME_COUNT ; 3
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update_second_ones:
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inc $7d0+TIME_OFFSET+3 ; 6
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inc $bd0+TIME_OFFSET+3 ; 6
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lda $bd0+TIME_OFFSET+3 ; 4
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cmp #$ba ; one past '9' ; 2
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bne done_time ; 3/2nt
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lda #'0'+$80 ; 2
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sta $7d0+TIME_OFFSET+3 ; 4
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sta $bd0+TIME_OFFSET+3 ; 4
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update_second_tens:
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inc $7d0+TIME_OFFSET+2 ; 6
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inc $bd0+TIME_OFFSET+2 ; 6
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lda $bd0+TIME_OFFSET+2 ; 4
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cmp #$b6 ; 6 (for 60 seconds) ; 2
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bne done_time ; 3/2nt
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lda #'0'+$80 ; 2
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sta $7d0+TIME_OFFSET+2 ; 4
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sta $bd0+TIME_OFFSET+2 ; 4
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update_minutes:
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inc $7d0+TIME_OFFSET ; 6
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inc $bd0+TIME_OFFSET ; 6
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; we don't handle > 9:59 songs yet
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done_time:
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;=============
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; 90 worst
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;=================================
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; Moved visualization here as a hack
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;=================================
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;============================
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; Visualization
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;============================
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jsr clear_top
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lda RASTERBARS_ON
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beq skip_rasters
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jsr draw_rasters
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skip_rasters:
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jsr volume_bars
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jsr page_flip
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check_keyboard:
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jsr get_key
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lda LASTKEY
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beq exit_interrupt
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cmp #(' '+$80)
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bne key_R
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key_space:
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lda #$80
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eor DONE_PLAYING
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jmp quiet_exit
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key_R:
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cmp #'R'
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bne key_left
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lda #$ff
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eor RASTERBARS_ON
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sta RASTERBARS_ON
|
|
|
|
jmp done_key
|
|
|
|
|
|
|
|
key_left:
|
|
|
|
cmp #'A'
|
|
|
|
bne key_right
|
|
|
|
|
|
|
|
lda #$40
|
|
|
|
bne quiet_exit
|
|
|
|
|
|
|
|
key_right:
|
|
|
|
cmp #'D'
|
|
|
|
bne done_key
|
|
|
|
|
|
|
|
lda #$20
|
|
|
|
bne quiet_exit
|
|
|
|
|
|
|
|
done_key:
|
|
|
|
jmp exit_interrupt
|
|
|
|
|
|
|
|
quiet_exit:
|
|
|
|
sta DONE_PLAYING
|
|
|
|
jsr clear_ay_both
|
|
|
|
|
|
|
|
;=====================================
|
|
|
|
; clear register area
|
|
|
|
;=====================================
|
|
|
|
ldx #13 ; 2
|
|
|
|
lda #0 ; 2
|
|
|
|
mb_clear_reg:
|
|
|
|
sta REGISTER_DUMP,X ; clear register value ; 4
|
|
|
|
sta REGISTER_OLD,X ; clear old values ; 4
|
2018-11-20 17:21:01 +00:00
|
|
|
sta REGISTER_DUMP2,X ; clear register value ; 4
|
|
|
|
sta REGISTER_OLD2,X ; clear old values ; 4
|
2018-11-19 18:06:19 +00:00
|
|
|
dex ; 2
|
|
|
|
bpl mb_clear_reg ; 2nt/3
|
|
|
|
|
|
|
|
exit_interrupt:
|
|
|
|
|
|
|
|
; pla ; restore a ; 4
|
|
|
|
|
|
|
|
pla
|
|
|
|
tay ; restore Y
|
|
|
|
pla
|
|
|
|
tax ; restore X
|
|
|
|
lda $45 ; restore A
|
|
|
|
|
|
|
|
|
|
|
|
rti ; return from interrupt ; 6
|
|
|
|
|
|
|
|
;============
|
|
|
|
; typical
|
|
|
|
; ???? cycles
|
|
|
|
|
|
|
|
|
|
|
|
REGISTER_OLD:
|
|
|
|
.byte 0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
2018-11-20 17:21:01 +00:00
|
|
|
|
|
|
|
REGISTER_OLD2:
|
|
|
|
.byte 0,0,0,0,0,0,0,0,0,0,0,0,0,0
|