2021-11-05 04:23:34 +00:00
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; Mockingboad programming:
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; + Has two 6522 I/O chips connected to two AY-3-8910 chips
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; + Optionally has some speech chips controlled via the outport on the AY
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; + Often in slot 4
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; TODO: how to auto-detect?
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; References used:
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; http://macgui.com/usenet/?group=2&id=8366
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; 6522 Data Sheet
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; AY-3-8910 Data Sheet
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;========================
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; Mockingboard card
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; Essentially two 6522s hooked to the Apple II bus
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; Connected to AY-3-8910 chips
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; PA0-PA7 on 6522 connected to DA0-DA7 on AY
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; PB0 on 6522 connected to BC1
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; PB1 on 6522 connected to BDIR
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; PB2 on 6522 connected to RESET
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; left speaker
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MOCK_6522_ORB1 = $C400 ; 6522 #1 port b data
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MOCK_6522_ORA1 = $C401 ; 6522 #1 port a data
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MOCK_6522_DDRB1 = $C402 ; 6522 #1 data direction port B
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MOCK_6522_DDRA1 = $C403 ; 6522 #1 data direction port A
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MOCK_6522_T1CL = $C404 ; 6522 #1 t1 low order latches
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MOCK_6522_T1CH = $C405 ; 6522 #1 t1 high order counter
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MOCK_6522_T1LL = $C406 ; 6522 #1 t1 low order latches
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MOCK_6522_T1LH = $C407 ; 6522 #1 t1 high order latches
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MOCK_6522_T2CL = $C408 ; 6522 #1 t2 low order latches
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MOCK_6522_T2CH = $C409 ; 6522 #1 t2 high order counters
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MOCK_6522_SR = $C40A ; 6522 #1 shift register
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MOCK_6522_ACR = $C40B ; 6522 #1 auxilliary control register
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MOCK_6522_PCR = $C40C ; 6522 #1 peripheral control register
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MOCK_6522_IFR = $C40D ; 6522 #1 interrupt flag register
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MOCK_6522_IER = $C40E ; 6522 #1 interrupt enable register
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MOCK_6522_ORANH = $C40F ; 6522 #1 port a data no handshake
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; right speaker
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MOCK_6522_ORB2 = $C480 ; 6522 #2 port b data
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MOCK_6522_ORA2 = $C481 ; 6522 #2 port a data
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MOCK_6522_DDRB2 = $C482 ; 6522 #2 data direction port B
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MOCK_6522_DDRA2 = $C483 ; 6522 #2 data direction port A
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; AY-3-8910 commands on port B
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; RESET BDIR BC1
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MOCK_AY_RESET = $0 ; 0 0 0
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MOCK_AY_INACTIVE = $4 ; 1 0 0
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MOCK_AY_READ = $5 ; 1 0 1
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MOCK_AY_WRITE = $6 ; 1 1 0
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MOCK_AY_LATCH_ADDR = $7 ; 1 1 1
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;========================
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;========================
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; Mockingboard Init
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;========================
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;========================
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mockingboard_init:
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;=========================
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; Initialize the 6522s
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; set the data direction for all pins of PortA/PortB to be output
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lda #$ff ; all output (1)
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sta MOCK_6522_DDRB1 ; set for 6522 #1
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sta MOCK_6522_DDRA1
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sta MOCK_6522_DDRB2 ; set for 6522 #2
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sta MOCK_6522_DDRA2
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mockingboard_setup_interrupt:
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;=========================
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; Setup Interrupt Handler
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;=========================
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; NOTE: we don't support IIc as it's a hack
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; traditionally Mockingboard on IIc was rare
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;========================
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; set up interrupt
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; Vector address goes to 0x3fe/0x3ff
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lda #<interrupt_handler
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sta $03fe
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lda #>interrupt_handler
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sta $03ff
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;============================
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; Enable 50Hz clock on 6522
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;============================
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; Note, on Apple II the clock isn't 1MHz but is actually closer to
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; roughly 1.023MHz, and every 65th clock is stretched (it's complicated)
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2021-11-12 01:29:38 +00:00
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; c7ce / 1.023e6 = .050s, 20Hz
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2021-11-05 04:23:34 +00:00
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; 9c40 / 1.023e6 = .040s, 25Hz
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; 8534 / 1.023e6 = .033s, 30Hz
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; 4fe7 / 1.023e6 = .020s, 50Hz
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; 411a / 1.023e6 = .016s, 60Hz
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; French Touch uses
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; 4e20 / 1.000e6 = .020s, 50Hz, which assumes 1MHz clock freq
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sei ; disable interrupts just in case
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lda #$40 ; Continuous interrupts, don't touch PB7
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sta MOCK_6522_ACR ; ACR register
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lda #$7F ; clear all interrupt flags
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sta MOCK_6522_IER ; IER register (interrupt enable)
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lda #$C0
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sta MOCK_6522_IFR ; IFR: 1100, enable interrupt on timer one oflow
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sta MOCK_6522_IER ; IER: 1100, enable timer one interrupt
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2021-11-12 01:29:38 +00:00
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lda #$CE
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; lda #$40
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2021-11-12 00:58:20 +00:00
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; lda #$34
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2021-11-05 04:23:34 +00:00
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; lda #$E7
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sta MOCK_6522_T1CL ; write into low-order latch
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2021-11-12 01:29:38 +00:00
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lda #$C7
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; lda #$9C
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2021-11-12 00:58:20 +00:00
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; lda #$85
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2021-11-05 04:23:34 +00:00
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; lda #$4f
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sta MOCK_6522_T1CH ; write into high-order latch,
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; load both values into counter
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; clear interrupt and start counting
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;===================================
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;===================================
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; Reset Both AY-3-8910s
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;===================================
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;===================================
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;===========================
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; Reset Right/Left AY-3-8910
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;===========================
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lda #MOCK_AY_RESET
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sta MOCK_6522_ORB1
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sta MOCK_6522_ORB2
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lda #MOCK_AY_INACTIVE
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sta MOCK_6522_ORB1
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sta MOCK_6522_ORB2
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init_registers:
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; init song data
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lda #0
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sta SONG_OFFSET
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sta SONG_COUNTDOWN
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; read 14 bytes from beginning of song to init
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ldx #13
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init_loop:
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init_smc:
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txa
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tay
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lda (SONG_L),Y
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jsr ay3_write_reg ; trashes Y
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dex
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bne init_loop
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; update SONG_L to point past the init
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lda SONG_L
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clc
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adc #14
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sta SONG_L
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bcc no_oflo
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inc SONG_H
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no_oflo:
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; create Frequency Table
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ldx #11
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make_freq_loop:
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sec
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lda frequency_lookup_low,X
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ror
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sta frequency_lookup_low+16,X
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lsr
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sta frequency_lookup_low+32,X
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lsr
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sta frequency_lookup_low+48,X
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dex
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bpl make_freq_loop
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inx
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stx frequency_lookup_low+28
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rts
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;=====================
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;=====================
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;=====================
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; ay3 write reg
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;=====================
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;=====================
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;=====================
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; writes to both chips (so same output to both Right/Left)
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; address in X (preserved)
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; value in A
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; NOTE: it looks like you could interleave things to save bytes
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; but technically this violates the AY-3-8910 spec sheet on
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; finishing accesses in less than 10us (10 cycles)
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ay3_write_reg:
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pha
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lda #MOCK_AY_LATCH_ADDR ; latch_address for PB1 ; 2
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ldy #MOCK_AY_INACTIVE ; go inactive ; 2
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stx MOCK_6522_ORA1 ; put address on PA1 ; 4
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sta MOCK_6522_ORB1 ; latch_address on PB1 ; 4
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sty MOCK_6522_ORB1 ; 4
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stx MOCK_6522_ORA2 ; put address on PA2 ; 4
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sta MOCK_6522_ORB2 ; latch_address on PB2 ; 4
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sty MOCK_6522_ORB2 ; 4
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pla
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; value
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sta MOCK_6522_ORA1 ; put value on PA1 ; 4
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sta MOCK_6522_ORA2 ; put value on PA2 ; 4
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lda #MOCK_AY_WRITE ; ; 2
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sta MOCK_6522_ORB1 ; write on PB1 ; 4
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sty MOCK_6522_ORB1 ; 4
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sta MOCK_6522_ORB2 ; write on PB2 ; 4
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sty MOCK_6522_ORB2 ; 4
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rts
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; starts at C4
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frequency_lookup_low:
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.byte $E8,$CD,$B3,$9B,$83,$6E,$59,$46,$33,$22,$12,$02
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;$1E8,$1CD,$1B3,$19B,$183,$16E,$159,$146,$133,$122,$112,$102,
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;.byte $F4,$E6,$D9,$CD,$C1,$B7,$AC,$A3,$99,$91,$89,$81,$00,$00,$00,$00
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;.byte $7A,$73,$6C,$66,$60,$5B,$56,$51,$4C,$48,$44,$40,$00,$00,$00,$00
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;.byte $3D,$39,$36,$33,$30,$2D,$2B,$28,$26,$24,$22,$20,$00,$00,$00,$00
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