qboot2: qboot, but set up so code is reusable

it's fast!
This commit is contained in:
Vince Weaver 2020-08-24 00:22:39 -04:00
parent 8e1eeb0376
commit 0d32e8040f
15 changed files with 844 additions and 1 deletions

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@ -52,7 +52,7 @@ int main(int argc, char **argv) {
fprintf(stderr,"Warning! Unusual track number %d\n",track);
}
if (track>15) {
if (sector>15) {
fprintf(stderr,"Warning! Unusual sector number %d\n",sector);
}

41
qboot2/80s.s Normal file
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SET_GR = $C050
FULLGR = $C052
PAGE0 = $C054
HIRES = $C057
WAIT = $FCA8 ;; delay 1/2(26+27A+5A^2) us
KEYPRESS = $C000
KEYRESET = $C010
the_1980s:
bit SET_GR
bit FULLGR
bit PAGE0
bit HIRES
forever:
lda KEYPRESS
bpl forever
bit KEYRESET
;============================
; setup load code
;============================
WHICH_LOAD = $80
lda #1
sta WHICH_LOAD
jmp $119A
.align $100
.incbin "new_80s.hgr"

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qboot2/CHANNELWOODC.BIN Normal file

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qboot2/MYSTC.BIN Normal file

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qboot2/Makefile Normal file
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include ../Makefile.inc
DOS33 = ../dos33fs-utils/dos33
DOS33_RAW = ../dos33fs-utils/dos33_raw
all: boot.dsk
boot.dsk: BOOT THE80S LS MY1 MY2 MY3
cp empty.dsk boot.dsk
$(DOS33_RAW) boot.dsk 0 0 BOOT 0 1
$(DOS33_RAW) boot.dsk 0 2 BOOT 1 1
$(DOS33_RAW) boot.dsk 0 4 BOOT 2 1
$(DOS33_RAW) boot.dsk 3 0 THE80S 0 33
$(DOS33_RAW) boot.dsk 8 0 LS 0 33
$(DOS33_RAW) boot.dsk 13 0 MY1 0 33
$(DOS33_RAW) boot.dsk 18 0 MY2 0 33
$(DOS33_RAW) boot.dsk 23 0 MY3 0 33
BOOT: boot_sector.o
ld65 -o BOOT boot_sector.o -C ../linker_scripts/apple2_800.inc
boot_sector.o: boot_sector.s stage2.s
ca65 -o boot_sector.o boot_sector.s -l boot_sector.lst
###
LS: ls.o
ld65 -o LS ls.o -C ../linker_scripts/apple2_1f00.inc
ls.o: ls.s lsc.hgr
ca65 -o ls.o ls.s -l ls.lst
###
MY1: my1.o
ld65 -o MY1 my1.o -C ../linker_scripts/apple2_1f00.inc
my1.o: my1.s
ca65 -o my1.o my1.s -l my1.lst
###
MY2: my2.o
ld65 -o MY2 my2.o -C ../linker_scripts/apple2_1f00.inc
my2.o: my2.s
ca65 -o my2.o my2.s -l my2.lst
###
MY3: my3.o
ld65 -o MY3 my3.o -C ../linker_scripts/apple2_1f00.inc
my3.o: my3.s
ca65 -o my3.o my3.s -l my3.lst
###
THE80S: 80s.o
ld65 -o THE80S 80s.o -C ../linker_scripts/apple2_1f00.inc
80s.o: 80s.s new_80s.hgr
ca65 -o 80s.o 80s.s -l 80s.lst
#new_80s.hgr: new_80s.png
# ../hgr-utils/png2hgr new_80s.png > new_80s.hgr
clean:
rm -f *~ *.o *.lst BOOT THE80S LS MY1 MY2 MY3

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qboot2/SELENETIC.BIN Normal file

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qboot2/boot_sector.s Normal file
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; fast seek/multi-read
; copyright (c) Peter Ferrie 2015-16
sectors = 33 ; user-defined
firsttrk = 3 ; user-defined, first track to read
firstsec = 0 ; user-defined, first sector to read
address = $1f ; user-defined
entry = $1f00 ; user-defined
version = 1
;memory usage:
;256 bytes ($300-3ff) static table
grouped = $300
;106 bytes ($200-269) static table
preshift = $200
zvalue = $fd ; only during init
znibble = $fe ; only during init
zmask = $ff ; only during init
; $26/$27 sector read location (ROM)
; $3D sector number (ROM)
; at entry (at least on AppleWin) A=1, X=60 (slot<<4), Y=0
; qkumba says cffa cards leave Y at $10
; 26/27 = 00/09
; 3D = 1
; For Disk II booting, the firmware loads track0/sector0
; to $800 and then jumps to $801
.org $800
.byte 1 ; number of sectors for ROM to load
boot_entry:
; this code loads two sectors up to $10/$11
lsr ; check sector number
tay
adc #$0f
sta $27 ; set or update address as needed
cmp #$12
; 10 11 12 (1 1 1)
; be, bf, c0 (1011 1011 1100)
; so if hit $c000 we are done
beq done_load_2 ; branch if loaded 2
inc $3d ; increment sector (faster to find)
; call to the read routine in proper slot
; using rts to jump indirect to
; $CX5C
; this routine reads sector in $3D on track $41
; to address in $26/$27
; when it's done it jumps back to $801
txa ; x is slot# << 4
lsr
lsr
lsr
lsr
ora #$c0 ; slot to PROM base
pha
lda #$5b ;read-1
pha
rts
done_load_2:
; patch self modifying code for Q6L read
txa
ora #$8c ; slot to Q6L
; Q6L?
; if slot 6, after this A is $EC
patch_loop:
iny
ldx patchtbl-3, Y
sta code_begin, X ; replace placeholders with Q6L
; BE02 = EC? lda c0ec
; so sets to c08c (Q6L)
bne patch_loop
; patch self-modifying code for turning motor off
and #$f8 ; MOTOROFF (c088) -> c0e8
sta slotpatch7+1
; patch self-modifying code for turning motor on
clc
adc #1 ; MOTOROFF (c088) -> c0e9
sta slotpatch9+1
; patch self-modifying code for phase off
eor #9 ; PHASEOFF (c080)
sta slotpatch8+1
ldx #$3f
stx zmask
inx
ldy #$7f
bne skip_ahead ; branch always
; pad with zeros until $839
; $839 is the entry point
; adjusts address at $8FE to be entry point
; jumps to boot 2
;.res $839-*
; lda #>(entry-1)
; pha
; lda #<(entry-1)
; pha
; jsr preread
; jmp $1000 ; stage2 entry point
patchtbl:
.byte <(slotpatch1+1), <(slotpatch2+1), <(slotpatch3+1)
.byte <(slotpatch4+1), <(slotpatch5+1), <(slotpatch6+1)
indextbl: ;the 0 also terminates the patchtbl list!
.byte 0, 2, 1, 3
;construct denibbilisation table
;pre-shifted for interleave read
skip_ahead:
loopaa:
sty znibble
tya
asl
bit znibble
beq loopz
ora znibble
eor #$ff
and #$7e
loopa:
bcs loopz
lsr
bne loopa
dex
txa
asl
asl
sta preshift-$16, Y
loopz:
dey
bne loopaa
;construct 2-bit group table
sty zvalue
loopbb:
lsr zmask
lsr zmask
loopb:
lda indextbl, X
sta grouped, Y
inc zvalue
lda zvalue
and zmask
bne loopy
inx
txa
and #3
tax
loopy:
iny
iny
iny
iny
cpy #3
bcs loopb
iny
cpy #3
bcc loopbb
lda #>(entry-1)
pha
lda #<(entry-1)
pha
jsr preread
; seek backward support
; sty startsec+1
; sta tmpadr+1
; stx total+1
jmp seekread
preread:
;copy post-read if necessary
;push post-read address here
; pla
; tax
; pla
; tay
; lda #>(postread-1)
; pha
; lda #<(postread-1)
; pha
; tya
; pha
; txa
; pha
lda #<(firsttrk*2)
sta phase+1
ldx #sectors
lda #address
ldy #firstsec
rts
end_code:
.res $8fe-*
; traditionally, entry point to jump to at end of loading
; $be01 in this case
;*=$8fe
.byte $10, 1
.include "stage2.s"

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qboot2/ls.s Normal file
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SET_GR = $C050
FULLGR = $C052
PAGE0 = $C054
HIRES = $C057
KEYPRESS = $C000
KEYRESET = $C010
landscape:
bit SET_GR
bit FULLGR
bit PAGE0
bit HIRES
forever:
lda KEYPRESS
bpl forever
bit KEYRESET
;============================
; setup load code
;============================
WHICH_LOAD = $80
lda #2
sta WHICH_LOAD
jmp $119A
.align $100
.incbin "lsc.hgr"

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qboot2/lsc.hgr Normal file

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39
qboot2/my1.s Normal file
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SET_GR = $C050
FULLGR = $C052
PAGE0 = $C054
HIRES = $C057
KEYPRESS = $C000
KEYRESET = $C010
landscape:
bit SET_GR
bit FULLGR
bit PAGE0
bit HIRES
forever:
lda KEYPRESS
bpl forever
bit KEYRESET
;============================
; setup load code
;============================
WHICH_LOAD = $80
lda #3
sta WHICH_LOAD
jmp $119A
.align $100
.incbin "MYSTC.BIN"

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qboot2/my2.s Normal file
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SET_GR = $C050
FULLGR = $C052
PAGE0 = $C054
HIRES = $C057
KEYPRESS = $C000
KEYRESET = $C010
landscape:
bit SET_GR
bit FULLGR
bit PAGE0
bit HIRES
forever:
lda KEYPRESS
bpl forever
bit KEYRESET
;============================
; setup load code
;============================
WHICH_LOAD = $80
lda #4
sta WHICH_LOAD
jmp $119A
.align $100
.incbin "SELENETIC.BIN"

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qboot2/my3.s Normal file
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SET_GR = $C050
FULLGR = $C052
PAGE0 = $C054
HIRES = $C057
KEYPRESS = $C000
KEYRESET = $C010
landscape:
bit SET_GR
bit FULLGR
bit PAGE0
bit HIRES
forever:
lda KEYPRESS
bpl forever
bit KEYRESET
;============================
; setup load code
;============================
WHICH_LOAD = $80
lda #0
sta WHICH_LOAD
jmp $119A
.align $100
.incbin "CHANNELWOODC.BIN"

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qboot2/new_80s.hgr Normal file

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qboot2/stage2.s Normal file
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; the following lives on sectors $0E and $0D
; why?
; request sector 2 and 4, and the interleave is
; beneath apple dos (3-23)
; Physical (firmware) : 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
; DOS33 mapping : 0, 7, 14, 6, 13, 5, 12, 4, 11, 3, 10, 2, 9, 1, 8, 15
; Beneath Apple DOS
; p86 (dos reference)
;
WAIT = $FCA8 ;; delay 1/2(26+27A+5A^2) us
.org $1000
code_begin:
.byte version
readnib:
slotpatch1: ; smc
lda $c0d1 ; gets set to C08C (Q6L) read
bpl readnib
rts
;fill address array for one track
seekread:
sty startsec+1
sta tmpadr+1
stx total+1
inittrk:
sec
lda #$10
sbc startsec+1
cmp total+1
bcs it_skip
tax
it_skip:
stx partial1
stx partial2
jsr seek
startsec:
ldy #$d1
tmpadr:
tmpadr_loop:
lda #$d1
sta addrtbl, y
inc tmpadr+1
iny
dec partial1
bne tmpadr_loop
read:
outer_read:
jsr readnib
inner_read:
cmp #$d5
bne outer_read
jsr readnib
cmp #$aa
bne inner_read
tay ; we need Y=#$AA later
jsr readnib
eor #$ad ; zero A if match
beq check_mode
;if not #$AD, then #$96 is assumed
ldy #2 ; volume, track, sector
another:
jsr readnib
rol ; set carry
sta sector+1
jsr readnib
and sector+1
dey
bpl another
tay
ldx addrtbl, Y ; fetch corresponding address
beq read
sta sector+1 ; store index for later
stx adrpatch1+2
stx adrpatch8+2
stx adrpatch2+2
stx adrpatch3+2
stx adrpatch5+2
stx adrpatch7+2
inx
stx adrpatch9+2
dex
dex
stx adrpatch4+2
stx adrpatch6+2
ldy #$fe
adrpatch1:
loop2:
lda $d102, Y
pha
iny
bne loop2
branch_read:
bcs read ; branch always
check_mode:
cpx #0
beq read ; loop if not expecting #$AD
loop33:
sta tmpval+1 ; zero rolling checksum
slotpatch2:
loop4:
ldx $c0d1
bpl loop4
lda preshift-$96, X
adrpatch2:
sta $d102, Y ; store 2-bit array
tmpval:
eor #$d1
iny
bne loop33
ldy #$aa
slotpatch3:
loop5:
ldx $c0d1
bpl loop5
eor preshift-$96, X
adrpatch3:
ldx $d102, Y ; bit2tbl
eor grouped+2, X ; first 86 nibbles use group bits 0-1
adrpatch4:
sta $d156, y
iny
bne loop5
and #$fc
ldy #$aa
slotpatch4:
loop6:
ldx $c0d1
bpl loop6
eor preshift-$96, X
adrpatch5:
ldx $d102, Y ; bit2tbl
eor grouped+1, X ; second 86 nibbles use group bits 2-3
adrpatch6:
sta $d1ac, Y
iny
bne loop6
and #$fc
ldx #$ac
slotpatch5:
loop7:
ldy $c0d1
bpl loop7
eor preshift-$96, Y
adrpatch7:
ldy $d100, X ; bit2tbl
eor grouped, Y ; last 84 nibbles use group bits 4-5
adrpatch8:
sta $d100, x
inx
bne loop7
and #$fc
slotpatch6:
loop8:
ldy $c0d1
bpl loop8
eor preshift-$96, Y
cmp #1 ; carry = !zero
ldy #1
loop9:
pla
adrpatch9:
sta $d100, Y
dey
bpl loop9
branch_read2:
bcs branch_read ; branch if checksum failure
sector:
ldy #$d1
txa
sta addrtbl, Y ; zero corresponding address
dec total+1
dec partial2 ; adjust remaining count (faster than looping over array)
sec
bne branch_read2 ; read all requested sectors in one track
total:
ldx #$d1
beq driveoff
inc phase+1
inc phase+1 ; update current track
jmp inittrk
driveoff:
slotpatch7:
lda $c0d1
seekret:
rts
seek:
lda #0
sta step+1
copy_cur:
curtrk:
lda #0
sta tmpval+1
sec
phase:
sbc #$d1
beq seekret
; if seek backwards
bcs sback
eor #$ff
inc curtrk+1
bcc ssback
sback:
adc #$fe
dec curtrk+1
ssback:
cmp step+1
bcc loop10
step:
lda #$d1
loop10:
cmp #8
bcs loop11
tay
sec
loop11:
lda curtrk+1
ldx step1, Y
bne loop12
loopmmm:
clc
lda tmpval+1
ldx step2, Y
loop12:
stx sector+1
and #3
rol
tax
slotpatch8:
sta $c0d1, X
loopmm:
ldx #$13
loopm:
dex
bne loopm
dec sector+1
bne loopmm
lsr
bcs loopmmm
inc step+1
bne copy_cur
step1: .byte 1, $30, $28, $24, $20, $1e, $1d, $1c
step2: .byte $70, $2c, $26, $22, $1f, $1e, $1d, $1c
addrtbl: .res 16
partial1: .byte $00
partial2: .byte $00
code_end:
WHICH_LOAD = $80
load_new:
; enable drive motor
slotpatch9:
lda $c0e9 ; fixme, patch
; wait 1s
ldx #6
wait_1s:
lda #255
jsr WAIT
dex
bne wait_1s
ldx WHICH_LOAD
; setup return on stack
; is value - 1
lda load_address,X
sec
sbc #1
pha
lda #$ff
pha
lda track_array,X
asl ; track to start*2
sta phase+1
lda load_address,X ; address to load
pha
lda sector_array,X
tay ; sector to start
lda length_array,X ; length
tax
pla
jmp seekread
load_address:
.byte $1f,$1f,$1f,$1f,$1f
track_array:
.byte 3,8,13,18,23
sector_array:
.byte 0,0,0,0,0
length_array:
.byte 33,33,33,33,33