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docs: update the dram explanation
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@ -35,21 +35,21 @@
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The SoC in a Raspberry Pi is actually a large GPU with a small
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The SoC in a Raspberry Pi is actually a large GPU with a small
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helper ARM processor tacked onto the side.
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helper ARM processor tacked onto the side.
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In a similar fashion, the Apple II is very much
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In a similar fashion, the Apple II is very much
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a TV-typewriter video terminal that happens to have a 6502
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a TV-typewriter video-terminal that happens to have a 6502
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processor attached to give the display something to do.
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processor attached to give the display something to do.
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The video display is key to many things, in fact the CPU clock
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The video display is key to many things, in fact the CPU clock
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usually runs at 978ns, but every 65th cycle
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usually runs at 978ns, but every 65th cycle
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it is extended to 1117ns to keep the video output in sync with the colorburst.
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it is extended to 1117ns to keep the video output in sync with the colorburst.
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This is why the 6502 runs at the odd average speed of 1.020484MHz.
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This is why the 6502 runs at the odd average speed of 1.020484MHz.
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Page 1 of The Apple II low-resolution graphics and text display share
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Text mode and low-resolution graphics share the same 1k region of memory
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the same 1k region of memory, from addresses {\tt \$400} to {\tt \$800}.
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from addresses {\tt \$400} to {\tt \$800} for Page1.
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In an easy-to-use setup you would have a linear memory map where
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A straightforward setup would have a linear memory map where
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location (0,0) would map to address {\tt \$400}, location (39,0) would map
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location (0,0) would map to address {\tt \$400}, location (39,0) would map
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to {\tt \$427}, and location (1,0) would be at {\tt \$428}.
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to {\tt \$427}, and location (1,0) would be at {\tt \$428}.
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That would make too much sense.
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That would make too much sense.
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First, each memory location holds an 8-bit value.
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The first complication is what is represented by each byte.
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In text mode this is just the ASCII value you want to print,
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In text mode this is just the ASCII value you want to print,
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although confusingly with the high bit set for plain text.
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although confusingly with the high bit set for plain text.
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Leaving the high bit clear does weird things like enable inverse
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Leaving the high bit clear does weird things like enable inverse
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@ -72,24 +72,25 @@ the addresses.
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Note that Line 2 starts at {\tt \$480}, not {\tt \$428} as you might expect.
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Note that Line 2 starts at {\tt \$480}, not {\tt \$428} as you might expect.
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{\tt \$428} actually corresponds to line 16.
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{\tt \$428} actually corresponds to line 16.
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The reason for this craziness turns out to Steve Wozniak being especially
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The reason for this craziness, as with most oddities on the Apple II,
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clever, and finding a way to get DRAM refresh essentially for free.
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turns out to be Steve Wozniak being especially clever.
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Early home computers often used static RAM (SRAM).
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Early home computers often used static RAM (SRAM).
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SRAM is easy to use, you just hook up the CPU address and read/write lines
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SRAM is easy to use, you just hook up the CPU address and read/write lines
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to the memory chips and read and write bytes as needed.
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to the memory chips and read and write bytes as needed.
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The Apple II uses dynamic RAM (DRAM) where each bit is stored in a capacitor
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The Apple II instead uses dynamic RAM (DRAM), where each bit is stored in
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whose value will leak away to zero unless you refresh it periodically.
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a capacitor whose value will leak away to zero unless you
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refresh it periodically.
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Why would you use memory that did that?
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Why would you use memory that did that?
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Well SRAM uses 6 transistors to store a bit, a DRAM only 1.
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Well SRAM uses 6 transistors to store a bit, DRAM uses only 1.
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So in theory you can fit 6 times the RAM in the same space, leading
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So in theory you can fit 6 times the RAM in the same space, leading
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to much cheaper costs and much better density.
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to much cheaper costs and much better density.
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Refreshing the DRAM involves regularly reading each memory value out faster
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Refreshing the DRAM involves regularly reading each memory value out faster
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than it leaks away.
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than it leaks away.
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Due to the design of DRAM, reads are destructive,
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Due to the design of DRAM, reads are destructive,
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so a read operation always reads out, recharges, then writes back
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so a read operation must always reads out, recharge, then write back
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the value.
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the original value.
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Refreshing can be slow.
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Refreshing can be slow.
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On many systems there was separate hardware to conduct the refresh, and
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On many systems there was separate hardware to conduct the refresh, and
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@ -117,17 +118,18 @@ performance).
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% memory with 2 more chips.
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% memory with 2 more chips.
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Steve Wozniak realized that he could avoid stopping the CPU for refresh.
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Steve Wozniak realized that he could avoid stopping the CPU for refresh.
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The 6502 clock has two phases.
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The 6502 clock has two phases:
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During first phase processor is busy
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during first phase processor is busy
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with internal work and the memory bus is idle.
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with internal work and the memory bus is idle.
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On the Apple II during the idle time it steps through the video memory
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On the Apple II during the idle time it steps through the video memory
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and updates the display.
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and updates the display.
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To refresh the 16k (4116) DRAM chips you need to read each 128-wide
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To refresh the 16k (model 4116) DRAM chips you need to read each 128-wide
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row at least once every 2ms.
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row at least once every 2ms.
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By carefully selecting the way that the CPU address lines map to
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By carefully selecting the way that the CPU address lines map to
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the RAS/CAS lines into the DRAM you can have the video scanning
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the RAS/CAS lines into the DRAM you can have the video scanning
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circuitry walk through each row of the DRAMs fast enough to
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circuitry walk through each row of the DRAMs fast enough to
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conduct the refresh for free, at the expense of having weird
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conduct the refresh for free.
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The main expense is you end up having weird
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interleaved video memory mappings.
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interleaved video memory mappings.
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%
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%
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@ -164,12 +166,13 @@ which hid the memory map, and did not realize the interleaving would
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be such a pain for assembly coders.
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be such a pain for assembly coders.
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So this is the reason for the ugly memory map.
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So this is the reason for the ugly memory map.
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It is also why Apple II graphics code often uses lookup tables and
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It is also why Apple II graphics code must use lookup tables and
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read/shift/mask operations just to do a simple plot operation.
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read/shift/mask operations just to do a simple plot operation.
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It is also why my demo code cheats and the sprite code only works
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It is also why my demo code cheats and the sprite code only works
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at even row offsets.
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at even row offsets, as otherwise there are a lot more corner cases
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And it may seem hard to believe, but the hi-res code drawing routines
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to handle.
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are even more complicated.
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It may seem hard to believe, but the hi-res code drawing routines
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are even more complicated then the mess described above.
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\input{table.tex}
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\input{table.tex}
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