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fire: update firmware version
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@ -32,15 +32,22 @@
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; 109 bytes -- replace BIT/OR in low calc with an ADC
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; 107 bytes -- replace self-modifying load/store absolute with Y-indirect
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; 106 bytes -- assume bit 8 is as random as bit 0
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; 82 bytes -- use VTAB in firmware to setup addresses
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; (Antoine Vignau on comp.sys.apple2 reminded me of this)
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; Zero Page
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SEEDL = $4E
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TEMP = $00
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TEMPY = $01
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OUTL = $02
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OUTH = $03
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INL = $04
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INH = $05
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OUTL = $04
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OUTH = $05
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BASL = $28
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BASH = $29
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COLOR = $30
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; CRAZY OPT: start with BASL for hline in 7d0 already in place
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; 100 = $64
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@ -52,6 +59,16 @@ LORES = $C056 ; Enable LORES graphics
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; monitor routines
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GR = $F390
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; VTAB notes
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; if Applesoft ROM, we can jump to ASOFT_VTAB which takes value in X
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; this won't work on the original Apple II with Integer ROM
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; we can jum to MON.TABV instead but then have to copy the value
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; to Accumulator first
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; This ovewrites CV (25)
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; Result is in BASL:BASH (28/29)
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ASOFT_VTAB = $F25A
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MON_TABV = $FB5B
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fire_demo:
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; GR part
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@ -63,6 +80,9 @@ fire_demo:
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; Setup white line on bottom
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; note: calling HLINE in firmware would take at least 13 bytes
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; open coded is 10
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lda #$ff ; 2
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ldy #39 ; 2
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white_loop:
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@ -82,15 +102,16 @@ yloop:
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; setup the load/store addresses
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; using Y-indirect is smaller than self-modifying code
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jsr get_row ; 3
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sty OUTL ; 2
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jsr ASOFT_VTAB ; 3
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lda BASL ; 2
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sta OUTL ; 2
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lda BASH ; 2
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sta OUTH ; 2
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inx ; 1
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inx
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jsr get_row ; 3
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sty INL ; 2
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sta INH ; 2
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jsr ASOFT_VTAB ; 3
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ldy #39 ; 2
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xloop:
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@ -116,14 +137,14 @@ noEor: sta SEEDL ; 2
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bmi no_change ; assume bit 8 is as random as bit 0 ; 2
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lda (INL),Y ; load value at row+1 ; 2
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lda (BASL),Y ; load value at row+1 ; 2
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and #$7 ; mask off ; 2
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tax ; 1
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lda <(color_progression),X ; 2
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.byte $2c ; BIT trick, nops out next instruction ; 1
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no_change:
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lda (INL),Y ; load value at row+1 ; 2
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lda (BASL),Y ; load value at row+1 ; 2
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smc_sta:
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@ -150,54 +171,3 @@ color_progression:
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.byte $dd ; 15->13 ; 1111 1101
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; Take row X and convert to address A:Y
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get_row:
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; get low byte
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; 000X X00O
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; lsr
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; 0000 XX00 O
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; adc #1
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; 0000 XXOx
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; lsr
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; 0000 0XXO
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; lsr
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; 0000 00XX O
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; ror
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txa ; 1
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and #$19 ; 2
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lsr ; 1
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adc #1 ; 2
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lsr ; 1
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lsr ; 1
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tay ; 1
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lda <low_offsets,Y ; 2
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ror ; 1
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tay ; 1
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;===========
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; 13
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; high byte of store address
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txa ; 1
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and #$7 ; 2
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lsr ; 1
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ora #$4 ; 2
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;===========
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; 6
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rts ; 1
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; 14+6 = 20, as opposed to full lookup table which would be
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; at least 24
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; down to 13+3 at the expense of readability
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; these are shifted left by one due to the algorithm
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low_offsets:
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.byte $00,$50,$a0
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