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chiptune_player: had timing of absolute store wrong :(
it's 4 cycles, not 3
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@ -467,17 +467,17 @@ Interrupt Timing / AY write latency:
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====================================
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Originally roughly 1500 cycles from start of interrupt
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to all AY registers being written.
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1500
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1600
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Moved clock to after, near the visualization stuff, more like
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1378 = 13+ (105*13)
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1534 = 13+ (117*13)
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Load frame data for next time at end of IRQ, instead of begin
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1029 = 13+2+(78*13)
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1185 = 13+2+(90*13)
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Inlined the mockingboard write routine
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873 = 13+2+(66*13)
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1029 = 13+2+(78*13)
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Only write registers that change. Added 6 cycles per loop
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951 worst case = 13+2+(10+5+50+7)*13
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304 if only one reg changed = 13+2+(18*13)+55
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1107 worst case = 13+2+(10+5+62+7)*13
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316 if only one reg changed = 13+2+(18*13)+67
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@ -69,29 +69,28 @@ mb_not_13:
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; inlined "write_ay_both" to save 12 cycles
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; address
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stx MOCK_6522_ORA1 ; put address on PA1 ; 3
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stx MOCK_6522_ORA2 ; put address on PA2 ; 3
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stx MOCK_6522_ORA1 ; put address on PA1 ; 4
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stx MOCK_6522_ORA2 ; put address on PA2 ; 4
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lda #MOCK_AY_LATCH_ADDR ; latch_address for PB1 ; 2
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sta MOCK_6522_ORB1 ; latch_address on PB1 ; 3
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sta MOCK_6522_ORB2 ; latch_address on PB2 ; 3
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sta MOCK_6522_ORB1 ; latch_address on PB1 ; 4
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sta MOCK_6522_ORB2 ; latch_address on PB2 ; 4
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_ORB1 ; 3
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sta MOCK_6522_ORB2 ; 3
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sta MOCK_6522_ORB1 ; 4
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sta MOCK_6522_ORB2 ; 4
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; value
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lda MB_VALUE ; 3
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sta MOCK_6522_ORA1 ; put value on PA1 ; 3
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sta MOCK_6522_ORA2 ; put value on PA2 ; 3
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sta MOCK_6522_ORA1 ; put value on PA1 ; 4
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sta MOCK_6522_ORA2 ; put value on PA2 ; 4
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lda #MOCK_AY_WRITE ; ; 2
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sta MOCK_6522_ORB1 ; write on PB1 ; 3
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sta MOCK_6522_ORB2 ; write on PB2 ; 3
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sta MOCK_6522_ORB1 ; write on PB1 ; 4
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sta MOCK_6522_ORB2 ; write on PB2 ; 4
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lda #MOCK_AY_INACTIVE ; go inactive ; 2
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sta MOCK_6522_ORB1 ; 3
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sta MOCK_6522_ORB2 ; 3
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sta MOCK_6522_ORB1 ; 4
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sta MOCK_6522_ORB2 ; 4
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; 50
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;===========
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; 50
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; 62
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mb_no_write:
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inx ; point to next register ; 2
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cpx #14 ; if 14 we're done ; 2
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