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https://github.com/bobbimanners/emailler.git
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263 lines
5.4 KiB
ArmAsm
263 lines
5.4 KiB
ArmAsm
; Ethernet driver for W5100 W5100 chip
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;
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.ifndef KPR_API_VERSION_NUMBER
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.define EQU =
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.include "../inc/kipper_constants.i"
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.endif
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.include "../inc/common.i"
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.include "w5100.i"
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DEFAULT_W5100_BASE = $DF20
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.export eth_init
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.export eth_rx
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.export eth_tx
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.export eth_driver_name
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.import eth_inp
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.import eth_inp_len
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.import eth_outp
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.import eth_outp_len
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.importzp eth_dest
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.importzp eth_src
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.importzp eth_type
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.importzp eth_data
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.export w5100_init
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.export w5100_read_reg
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.export w5100_write_reg
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.import cfg_mac
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.import cfg_ip
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.import cfg_netmask
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.import cfg_gateway
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.export icmp_ping
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.export icmp_echo_ip
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.export ip_init
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.export ip_process
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.import ip65_error
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.segment "IP65ZP" : zeropage
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.code
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;initialize the ethernet adaptor
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;inputs: none
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;outputs: carry flag is set if there was an error, clear otherwise
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;this implementation uses a default address for the w5100, and can be
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;called as a 'generic' eth driver init function
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;w5100 aware apps can use w5100_init and pass in a different
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;base address
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eth_init:
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ldax #DEFAULT_W5100_BASE
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;initialize the w5100 ethernet adaptor
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;inputs: AX=base address for w5100 i/o
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;outputs: carry flag is set if there was an error, clear otherwise
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w5100_init:
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stx set_hi+2
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stx set_lo+2
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stx read_data_reg+2
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stx write_data_reg+2
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stx read_mode_reg+2
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stx write_mode_reg+2
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tax
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stx read_mode_reg+1
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stx write_mode_reg+1
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inx
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stx set_hi+1
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inx
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stx set_lo+1
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inx
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stx read_data_reg+1
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stx write_data_reg+1
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lda #$80 ;reset
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jsr write_mode_reg
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jsr read_mode_reg
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bne @error ;writing a byte to the MODE register with bit 7 set should reset.
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;after a reset, mode register is zero
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;therefore, if there is a real W5100 at the specified address,
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;we should be able to write a $80 and read back a $00
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lda #$03 ;set indirect + autoincrement
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jsr write_mode_reg
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jsr read_mode_reg
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cmp #$03
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bne @error ;make sure if we write to mode register without bit 7 set,
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;the value persists.
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ldax #$0016
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jsr set_register_address
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ldx #$00 ;start writing to reg $0016 - Interrupt Mask Register
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@loop:
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lda w5100_config_data,x
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jsr write_data_reg
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inx
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cpx #$06
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bne @loop
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lda #$09
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jsr set_lo
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ldx #$00 ;start writing to reg $0009 - MAC address
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@mac_loop:
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lda cfg_mac,x
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jsr write_data_reg
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inx
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cpx #$06
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bne @mac_loop
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jsr set_ip_params
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;set up socket 0 for MAC RAW mode
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ldax #W5100_S0_MR
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ldy #W5100_MODE_IP_RAW
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jsr w5100_write_reg
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;open socket 0
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ldax #W5100_S0_CR
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ldy #W5100_CMD_OPEN
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jsr w5100_write_reg
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clc
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rts
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@error:
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sec
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rts ;
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;receive a packet
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;inputs: none
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;outputs:
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; if there was an error receiving the packet (or no packet was ready) then carry flag is set
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; if packet was received correctly then carry flag is clear,
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; eth_inp contains the received packet,
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; and eth_inp_len contains the length of the packet
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eth_rx:
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; send a packet
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;inputs:
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; eth_outp: packet to send
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; eth_outp_len: length of packet to send
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;outputs:
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; if there was an error sending the packet then carry flag is set
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; otherwise carry flag is cleared
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eth_tx:
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inc $d020
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sec
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rts
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; read one of the W5100 registers
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; inputs: AX = register number to read
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; outputs: A = value of nominated register
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; y is overwritten
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w5100_read_reg:
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jsr set_register_address
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jmp read_data_reg
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; write to one of the W5100 registers
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; inputs: AX = register number to read
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; Y = value to write to register
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; outputs: none
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w5100_write_reg:
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jsr set_register_address
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tya
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jmp write_data_reg
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set_ip_params:
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ldax #W5100_GAR0
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jsr set_register_address
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ldx #0
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@gateway_loop:
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lda cfg_gateway,x
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jsr write_data_reg
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inx
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cpx #$04
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bne @gateway_loop
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ldx #0
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@netmask_loop:
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lda cfg_netmask,x
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jsr write_data_reg
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inx
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cpx #$04
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bne @netmask_loop
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ldax #W5100_SIPR0
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jsr set_register_address
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ldx #0
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@ip_loop:
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lda cfg_ip,x
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jsr write_data_reg
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inx
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cpx #$04
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bne @ip_loop
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rts
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icmp_ping:
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ip_init:
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ip_process:
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rts
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.rodata
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eth_driver_name:
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.asciiz "WIZNET 5100"
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w5100_config_data:
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.byte $00 ;no interrupts
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.byte $0f ;400ms retry (default)
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.byte $a0
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.byte $08 ;# of timeouts
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.byte $55 ;4 sockets @2K each, tx/rx
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.byte $55
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.segment "SELF_MODIFIED_CODE"
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set_register_address:
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set_hi:
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stx $FFFF ;WIZNET_ADDR_HI
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set_lo:
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sta $FFFF ;WIZNET_ADDR_LO
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rts
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read_data_reg:
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lda $FFFF ;WIZNET_DATA
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rts
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write_data_reg:
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sta $FFFF ;WIZNET_DATA
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rts
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read_mode_reg:
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lda $FFFF ;WIZNET_BASE
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rts
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write_mode_reg:
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sta $FFFF ;WIZNET_BASE
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rts
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.bss
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temp: .res 1
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icmp_echo_ip:
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;-- LICENSE FOR w5100a.s --
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; The contents of this file are subject to the Mozilla Public License
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; Version 1.1 (the "License"); you may not use this file except in
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; compliance with the License. You may obtain a copy of the License at
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; http://www.mozilla.org/MPL/
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;
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; Software distributed under the License is distributed on an "AS IS"
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; basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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; License for the specific language governing rights and limitations
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; under the License.
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;
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; The Original Code is ip65.
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;
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; The Initial Developer of the Original Code is Jonno Downes (jonno@jamtronix.com)
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; Portions created by the Initial Developer is Copyright (C) 2010
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; Jonno Downes. All Rights Reserved.
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; -- LICENSE END --
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