Apple-2-SW/lawless-legends
1
0
Fork 0
mirror of https://github.com/badvision/lawless-legends.git synced 2025-03-01 18:29:12 +00:00
Code Issues Projects Releases Wiki Activity

A bit of optimization.

Browse Source
This commit is contained in:
Martin Haye 2017-09-19 06:36:50 -07:00
parent 35969f4127
commit be7de86526
1 changed files with 20 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

42
Platform/Apple/virtual/src/core/mem.s
View File

@ -14,7 +14,7 @@
; ;
; See detailed description in mem.i ; See detailed description in mem.i
* = $4000 ; PLASMA loader loads us initially at $2000 * = $4000 ; PLASMA loader loads us initially at $4000
; Use hi-bit ASCII for Apple II ; Use hi-bit ASCII for Apple II
!convtab "../include/hiBitAscii.ct" !convtab "../include/hiBitAscii.ct"
@ -27,8 +27,8 @@
; Constants ; Constants
MAX_SEGS = 96 MAX_SEGS = 96
DEBUG = 0 DEBUG = 1
SANITY_CHECK = 0 ; also prints out request data SANITY_CHECK = 1 ; also prints out request data
; Zero page temporary variables ; Zero page temporary variables
tmp = $2 ; len 2 tmp = $2 ; len 2
@ -318,8 +318,8 @@ init: !zone
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
; Vectors and debug support code - these go in low memory at $800 ; Vectors and debug support code - these go in low memory at $800
loMemBegin: !pseudopc $800 { loMemBegin: !pseudopc $800 {
jmp j_main_dispatch jmp __main_dispatch
jmp j_aux_dispatch jmp __aux_dispatch
jmp __asmPlasmNoRet jmp __asmPlasmNoRet
jmp __asmPlasmRet jmp __asmPlasmRet
@ -343,17 +343,14 @@ loMemBegin: !pseudopc $800 {
_fixedRTS: _fixedRTS:
rts ; fixed place to find RTS, for setting V flag rts ; fixed place to find RTS, for setting V flag
j_main_dispatch: __aux_dispatch:
sec
!byte $24 ; skip over next byte
__main_dispatch:
clc
bit setLcRW+lcBank1 ; switch in mem mgr bit setLcRW+lcBank1 ; switch in mem mgr
bit setLcRW+lcBank1 bit setLcRW+lcBank1
jsr main_dispatch jsr dispatch
bit setLcRW+lcBank2 ; back to PLASMA
rts
j_aux_dispatch:
bit setLcRW+lcBank1 ; switch in mem mgr
bit setLcRW+lcBank1
jsr aux_dispatch
bit setLcRW+lcBank2 ; back to PLASMA bit setLcRW+lcBank2 ; back to PLASMA
rts rts
@ -1286,13 +1283,12 @@ scanForAvail: !zone
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
main_dispatch: !zone main_dispatch: !zone
+ pha clc
lda #0 dispatch:
beq .go
aux_dispatch:
pha pha
lda #1 lda #0
.go sta isAuxCmd rol ; transfer carry bit
sta isAuxCmd ; to isAuxCmd
pla pla
!if SANITY_CHECK { jsr saneStart : jsr + : jmp saneEnd } !if SANITY_CHECK { jsr saneStart : jsr + : jmp saneEnd }
+ cmp #REQUEST_MEMORY + cmp #REQUEST_MEMORY
@ -1855,11 +1851,13 @@ mem_queueLoad: !zone
lda #QUEUE_LOAD lda #QUEUE_LOAD
ldx #RES_TYPE_BYTECODE ldx #RES_TYPE_BYTECODE
ldy resNum ldy resNum
jsr aux_dispatch ; load the aux mem part (the bytecode) sec
jsr dispatch ; load the aux mem part (the bytecode)
lda #QUEUE_LOAD lda #QUEUE_LOAD
ldx #RES_TYPE_FIXUP ; queue loading of the fixup resource ldx #RES_TYPE_FIXUP ; queue loading of the fixup resource
ldy resNum ldy resNum
jsr aux_dispatch sec
jsr dispatch
.modRet ldx #11 ; all done; return address of the main memory block. .modRet ldx #11 ; all done; return address of the main memory block.
ldy #22 ldy #22
rts rts