mirror of
https://github.com/jeremysrand/mocklib.git
synced 2024-09-29 08:57:11 +00:00
Remove some debug code. Chain the speech interrupt handler with the usual cc65 one since I can't seem to get the cc65 IRQ mechanism to work. General cleanup of the assembly code.
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@ -13,10 +13,9 @@
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extern uint8_t *speechData;
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extern uint8_t *speechData;
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extern uint16_t speechLen;
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extern uint16_t speechLen;
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extern uint8_t speechBusy;
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extern uint8_t speechBusy;
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extern uint16_t outptr;
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extern uint16_t endptr;
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extern void setupSpeech(void);
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extern void setupSpeech(void);
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extern void unsetupSpeech(void);
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#endif /* speech_h */
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#endif /* speech_h */
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@ -7,139 +7,169 @@
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;
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;
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.export _setupSpeech, _speechData, _speechLen, _speechBusy
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.export _setupSpeech, _unsetupSpeech
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.export _outptr, _endptr
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.export _speechData, _speechLen, _speechBusy
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; .interruptor speechIRQ
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OUTPTR := $FB ;START OF DATA POINTER
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TMPPTR := $FB ; Temporary pointer used in interrupt handler
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IRQL := $03FE ;INTERRUPT VECTOR, LOW BYTE
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IRQL := $03FE ; Interrupt vector, low byte
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IRQH := $03FF ;INTERRUPT VECTOR, HIGH BYTE
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IRQH := $03FF ; Interrupt vector, high byte
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BASE := $C440 ;FIRST SPEECH CHIP
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BASE := $C440 ; First speech chip
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DURPHON := BASE ;REGISTER 0 OF SPEECH CHIP
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DURPHON := BASE ; Register 0 of speech chip
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INFLECT := BASE+$01 ;REGISTER 1 OF SPEECH CHIP
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INFLECT := BASE+$01 ; Register 1 of speech chip
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RATEINF := BASE+$02 ;REGISTER 2 OF SPEECH CHIP
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RATEINF := BASE+$02 ; Register 2 of speech chip
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CTTRAMP := BASE+$03 ;REGISTER 3 OF SPEECH CHIP
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CTTRAMP := BASE+$03 ; Register 3 of speech chip
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FILFREQ := BASE+$04 ;REGISTER 4 OF SPEECH CHIP
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FILFREQ := BASE+$04 ; Register 4 of speech chip
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DDRB := $C402
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DDRB := $C402
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DDRA := $C403
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DDRA := $C403
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PCR := $C48C ;PERIPHERAL CONTROL REG-6522
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PCR := $C48C ; Peripheral control register, 6522
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IFR := $C48D ;INTERRUPT FLAG REG-6522
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IFR := $C48D ; Interrupt flag register, 6522
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IER := $C48E
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IER := $C48E
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.DATA
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.DATA
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speechIRQ: .byte $60, <_interr, >_interr ; RTS plus two dummy bytes
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_speechData: .byte $00, $00
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_speechData: .byte $00, $00
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_speechLen: .byte $00, $00
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_speechLen: .byte $00, $00
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_outptr: .byte $00, $00
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_outptr: .byte $00, $00
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_endptr: .byte $00, $00
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_endptr: .byte $00, $00
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_speechBusy: .byte $00
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_speechBusy: .byte $00
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_irqLandingPad: .byte $4C, $00, $00
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.CODE
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.CODE
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.proc _setupSpeech
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.proc _setupSpeech
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SEI ;DISABLE INTERRUPTS
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sei ; Disable interrupts
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LDA #<_interr ;SET INTERRUPT VECTOR
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STA IRQL ;TO POINT TO INTERRUPT
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LDA #>_interr ;SERVICE ROUTINE
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STA IRQH
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; LDA #$4C ; JMP opcode
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; STA speechIRQ
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LDA #$00
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STA DDRA
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STA DDRB
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LDA _speechData+1 ;GET HIGH ADDRESS OF DATA
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lda IRQL ; Store the old interrupt vector
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STA OUTPTR+1 ;STORE IN WORK POINTER
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sta _irqLandingPad+1
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LDA _speechData ;GET LOW ADDRESS OF DATA
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lda IRQH
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STA OUTPTR ;STORE LOW BYTE
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sta _irqLandingPad+2
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LDA _speechLen+1 ;GET HIGH LENGTH BYTE
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lda #<_interr ; Set interrupt vector
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CLC
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sta IRQL ; to point to interrupt
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ADC _speechData+1 ;AND ADD TO BASE ADDRESS
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lda #>_interr ; service routine
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STA _endptr+1 ;STORE END ADDRESS
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sta IRQH
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LDA _speechLen ;GET LOW LENGTH BYTE
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lda #$00
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CLC
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sta DDRA
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ADC _speechData ;AND ADD TO BASE ADDRESS
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sta DDRB
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BCC @L2 ;CHECK FOR PAGE BOUNDARY
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INC _endptr+1
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lda _speechData+1 ; Get high address of data
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sta _outptr+1 ; Store in work pointer
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lda _speechData ; Get low address of data
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sta _outptr ; Store low byte
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lda _speechLen+1 ; Get high length byte
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clc
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adc _speechData+1 ; And add to base address
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sta _endptr+1 ; Store end address
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lda _speechLen ; Get low length byte
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clc
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adc _speechData ; And add to base address
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bcc @L2 ; Check for page boundary
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inc _endptr+1
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@L2:
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@L2:
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STA _endptr ;STORE END ADDRESS
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sta _endptr ; Store end address
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LDA #$FF ;SET BUSY FLAG
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lda #$FF ; Set busy flag
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STA _speechBusy ;AND SET PERIPHERAL CONTROL
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sta _speechBusy ; And set peripheral control
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LDA #$0C ;REGISTER TO RECOGNIZE
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lda #$0C ; Register to recognize
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STA PCR ;SIGNAL FROM SPEECH CHIP
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sta PCR ; Signal from speech chip
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LDA #$80 ;RAISE CTRL BIT IN REGISTER 3
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lda #$80 ; Raise control bit in register 3
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STA CTTRAMP
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sta CTTRAMP
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LDA #$C0 ;SET TRANSITIONED INFLECTION
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lda #$C0 ; Set transitioned inflection
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STA DURPHON ;MODE IN REGISTER 0
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sta DURPHON ; Mode in register 0
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LDA #$70 ;LOWER CTRL BIT
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lda #$70 ; Lower control bit
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STA CTTRAMP
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sta CTTRAMP
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LDA #$82 ;ENABLE 6522 INTERRUPTS
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lda #$82 ; Enable 6522 interrupts
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STA IER
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sta IER
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CLI ;CLEAR INTERRUPT MASK
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cli ; Clear interrupt mask
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RTS ;RETURN TO CALLER
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rts ; Return to caller
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.endproc
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.proc _unsetupSpeech
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sei ; Restore the old interrupt vector
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lda _irqLandingPad+1
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sta IRQL
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lda _irqLandingPad+2
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sta IRQH
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cli
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rts
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.endproc
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.endproc
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.proc _interr
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.proc _interr
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PHA
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pha ; Save accumulator
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TXA ;SAVE REGISTERS
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lda IFR
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PHA
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bmi @L4 ; If we have 6522 interrupt jump to L4
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TYA
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pla ; Otherwise restore the accumulator
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PHA
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jmp _irqLandingPad ; And jump to the old interrupt handler
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LDA IFR
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@L4:
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BPL @L2
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txa ; Save other registers
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LDA #$02 ;CLEAR INTERRUPT FLAG
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pha
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STA IFR
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tya
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LDY #$00 ;INIT REGISTERS
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pha
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LDX #$04
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lda #$02 ; Clear interrupt flag
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LDA OUTPTR+1
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sta IFR
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CMP _endptr+1
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ldy #$00 ; Init registers
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BCC @L1
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ldx #$04
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BNE @L5
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lda _outptr+1
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LDA OUTPTR ;CHECK FOR END OF DATA FILE
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cmp _endptr+1
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CMP _endptr
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bcc @L1
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BCC @L1 ;IF NOT THEN CONTINUE
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bne @L5
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lda _outptr ; Check for end of data file
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cmp _endptr
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bcc @L1 ; If not, then continue
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@L5:
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@L5:
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LDA #$00 ;IF END, TURN EVERYTHING OFF
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lda #$00 ; If end, turn everything off
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STA DURPHON ;STORE PAUSE PHONEME
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sta DURPHON ; Store pause phoneme
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LDA #$70 ;ZERO AMPLITUDE
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lda #$70 ; Zero amplitude
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STA CTTRAMP
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sta CTTRAMP
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LDA #$00 ;CLEAR BUSY FLAG
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lda #$00 ; Clear busy flag
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STA _speechBusy
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sta _speechBusy
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LDA #$02 ;CLEAR INTERRUPT ENABLE
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lda #$02 ; Clear interrupt enable
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STA IER ;IN 6522
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sta IER ; In 6522
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LDA #$FF
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lda #$FF
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STA DDRA
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sta DDRA
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LDA #$07
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lda #$07
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STA DDRB
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sta DDRB
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@L2:
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@L2:
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LDA OUTPTR
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pla ; Restore registers
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STA _outptr
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tay
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LDA OUTPTR+1
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pla
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STA _outptr+1
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tax
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PLA ;RESTORE REGISTERS
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pla
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TAY
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rti ; Return from interrupt
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PLA
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TAX
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PLA
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RTI ;RETURN FROM INTERRUPT
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@L1:
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@L1:
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LDA (OUTPTR),Y ;GET DATA
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lda TMPPTR ; Save the value in the tmp pointer
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STA BASE,X ;STORE IN SPEECH CHIP
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pha
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INC OUTPTR ;NEXT DATA
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lda TMPPTR+1
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BNE @L3
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pha
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INC OUTPTR+1
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lda _outptr ; Move the _outptr into the tmp pointer
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sta TMPPTR
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lda _outptr+1
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sta TMPPTR+1
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@L6:
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lda (TMPPTR),Y ; Get data
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sta BASE,X ; Store in speech chip
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inc TMPPTR ; Next data
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bne @L3
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inc TMPPTR+1
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@L3:
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@L3:
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DEX ;NEXT REGISTER
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dex ; Next register
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CPX #$FF ;LAST REGISTER?
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cpx #$FF ; Last register?
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BNE @L1 ;NO, CONTINUE
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bne @L6 ; No, then continue
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BEQ @L2 ;YES, RETURN
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lda TMPPTR ; We are done, move tmp pointer to _outptr
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sta _outptr
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lda TMPPTR+1
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sta _outptr+1
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pla ; Restore the tmp pointer
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sta TMPPTR+1
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pla
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sta TMPPTR
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jmp @L2 ; Finish the interrupt handler
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.endproc
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.endproc
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@ -15,15 +15,6 @@
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bool speechIsBusy(void)
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bool speechIsBusy(void)
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{
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{
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static uint16_t old_outptr = 0;
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if (old_outptr == 0) {
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printf("endptr=%x\n", endptr);
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}
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if (old_outptr != outptr) {
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old_outptr = outptr;
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printf("%x ", old_outptr);
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}
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//printf("busy=0x%x, outptr=0x%x, endptr=0x%x\n", speechBusy, outptr, endptr);
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return (speechBusy != 0);
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return (speechBusy != 0);
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}
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}
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