prog8/examples/test.p8

%import textio
%import syslib
%zeropage basicsafe
main {
    sub start() {
        ubyte xx = 1
        uword ww=1


        xx |= %0001000
        txt.print_ubbin(xx, true)
        txt.nl()
        xx &= %11110111
        txt.print_ubbin(xx, true)
        txt.nl()


        ww |= %0001000
        txt.print_uwbin(ww, true)
        txt.nl()
        ww &= %11110111
        txt.print_uwbin(ww, true)
        txt.nl()
    }
}
improve the way %option merge works, you can now merge your own code with library code for instance. 2023-11-14 21:47:31 +00:00			`%import textio`
breaking change: sys.set_irq() and sys.set_rasterirq() no longer have useKernal parameter! The irq handler routine must return a boolean instead in the A register. When it returns true it means run the system IRQ handler afterwards. When it returns false, the system handler is NOT ran afterwards. 2023-11-21 21:33:37 +00:00			`%import syslib`
vm: treat floats as 64 bits doubles. 0.0 printed as "0". 2023-11-20 22:19:08 +00:00			`%zeropage basicsafe`
monogfx and gfx2: flood fill uses optimized horizontal line drawing 2023-10-15 20:44:34 +00:00			`main {`
diskio.f_open_w() error handling back to what it was before Otherwise it eats the status message. Added comment that you have to check this manually to be sure if the call succeeded or not! 2023-11-12 19:40:17 +00:00			`sub start() {`
65C02 cpu: use TRB and TSB instructions for in-place AND/OR. 2023-11-23 23:50:36 +00:00			`ubyte xx = 1`
			`uword ww=1`
renamed cx16.VERA_IRQ_LINE_L to VERA_IRQLINE_L and added VERA_SCANLINE_L, to align with official register naming. Also added a multi-irq example for the X16 to show the updated irq handler semantics. 2023-11-22 00:42:41 +00:00

65C02 cpu: use TRB and TSB instructions for in-place AND/OR. 2023-11-23 23:50:36 +00:00			`xx \|= %0001000`
			`txt.print_ubbin(xx, true)`
			`txt.nl()`
			`xx &= %11110111`
			`txt.print_ubbin(xx, true)`
			`txt.nl()`
breaking change: sys.set_irq() and sys.set_rasterirq() no longer have useKernal parameter! The irq handler routine must return a boolean instead in the A register. When it returns true it means run the system IRQ handler afterwards. When it returns false, the system handler is NOT ran afterwards. 2023-11-21 21:33:37 +00:00

65C02 cpu: use TRB and TSB instructions for in-place AND/OR. 2023-11-23 23:50:36 +00:00			`ww \|= %0001000`
			`txt.print_uwbin(ww, true)`
			`txt.nl()`
			`ww &= %11110111`
			`txt.print_uwbin(ww, true)`
			`txt.nl()`
next version 2023-11-14 17:23:37 +00:00			`}`
fix alignment of uninitialized arrays in aligned blocks (make them initialized with zeros so they don't end up in the BSS section) fix alignment of uninitialized arrays in aligned blocks (make them initialized with zeros so they don't end up in the BSS section) 2023-10-03 20:54:28 +00:00			`}`