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fix IR same register error

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This commit is contained in:
Irmen de Jong 2023-03-28 19:50:03 +02:00
parent 729209574e
commit 07fde7f6cc
1 changed files with 3 additions and 7 deletions
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10
codeGenIntermediate/src/prog8/codegen/intermediate/BuiltinFuncGen.kt
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@ -47,19 +47,15 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
}
private fun funcStringCompare(call: PtBuiltinFunctionCall): ExpressionCodeResult {
/*
loadm.w r65500,string.compare.st1
loadm.w r65501,string.compare.st2
syscall 29
returnreg.b r0
*/
val result = mutableListOf<IRCodeChunkBase>()
val left = exprGen.translateExpression(call.args[0])
val right = exprGen.translateExpression(call.args[1])
val targetReg = codeGen.registers.nextFree()
addToResult(result, left, 65500, -1)
addToResult(result, right, 65501, -1)
addInstr(result, IRInstruction(Opcode.SYSCALL, value=IMSyscall.COMPARE_STRINGS.number), null)
return ExpressionCodeResult(result, IRDataType.BYTE, 0, -1)
addInstr(result, IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1=targetReg, reg2=0), null)
return ExpressionCodeResult(result, IRDataType.BYTE, targetReg, -1)
}
private fun funcCmp(call: PtBuiltinFunctionCall): ExpressionCodeResult {