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don't require carry parameter Pc to asmsubs to be last
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parent
2aa39757b4
commit
0ed3d951a7
@ -351,10 +351,6 @@ internal class AstChecker(private val program: Program,
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if(statusFlagsNoCarry.isNotEmpty())
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if(statusFlagsNoCarry.isNotEmpty())
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err("can only use Carry as status flag parameter")
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err("can only use Carry as status flag parameter")
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val carryParameter = subroutine.asmParameterRegisters.singleOrNull { it.statusflag==Statusflag.Pc }
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if(carryParameter!=null && carryParameter !== subroutine.asmParameterRegisters.last())
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err("carry parameter has to come last")
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} else {
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} else {
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// Pass-by-reference datatypes can not occur as parameters to a subroutine directly
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// Pass-by-reference datatypes can not occur as parameters to a subroutine directly
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// Instead, their reference (address) should be passed (as an UWORD).
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// Instead, their reference (address) should be passed (as an UWORD).
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@ -91,11 +91,15 @@ internal class FunctionCallAsmGen(private val program: Program, private val asmg
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when {
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when {
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stmt.args.all {isNoClobberRisk(it)} -> {
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stmt.args.all {isNoClobberRisk(it)} -> {
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// There's no risk of clobbering for these simple argument types. Optimize the register loading directly from these values.
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// There's no risk of clobbering for these simple argument types. Optimize the register loading directly from these values.
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// register assignment order: 1) cx16 virtual word registers, 2) actual CPU registers, 3) CPU Carry status flag.
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val argsInfo = sub.parameters.withIndex().zip(stmt.args).zip(sub.asmParameterRegisters)
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val argsInfo = sub.parameters.withIndex().zip(stmt.args).zip(sub.asmParameterRegisters)
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val (cx16virtualRegsArgsInfo, otherRegsArgsInfo) = argsInfo.partition { it.second.registerOrPair in Cx16VirtualRegisters }
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val (cx16virtualRegs, args2) = argsInfo.partition { it.second.registerOrPair in Cx16VirtualRegisters }
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for(arg in cx16virtualRegsArgsInfo)
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val (cpuRegs, statusRegs) = args2.partition { it.second.registerOrPair!=null }
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for(arg in cx16virtualRegs)
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argumentViaRegister(sub, arg.first.first, arg.first.second)
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argumentViaRegister(sub, arg.first.first, arg.first.second)
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for(arg in otherRegsArgsInfo)
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for(arg in cpuRegs)
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argumentViaRegister(sub, arg.first.first, arg.first.second)
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for(arg in statusRegs)
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argumentViaRegister(sub, arg.first.first, arg.first.second)
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argumentViaRegister(sub, arg.first.first, arg.first.second)
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}
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}
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else -> {
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else -> {
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@ -2,9 +2,10 @@
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TODO
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TODO
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====
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====
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- don't require carry parameter Pc to asmsubs to be last; sort this out yourself like with the R0-R15 registers
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- make blocks without explicit memory address, word-aligned in the assembly.
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- make blocks without explicit memory address, word-aligned in the assembly.
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- add sound to the cx16 tehtriz
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- add sound to the cx16 tehtriz
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- hoist all variable declarations up to the subroutine scope *before* even the constant folding takes place (to avoid undefined symbol errors when referring to a variable from another nested scope in the subroutine)
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- hoist all variable declarations up to the subroutine scope *before* even the constant folding takes place (to avoid undefined symbol errors when referring to a variable from another nested scope in the subroutine)
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- refactor the asmgen into their own submodule?
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- refactor the asmgen into their own submodule?
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- refactor the compiler optimizers into their own submodule?
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- refactor the compiler optimizers into their own submodule?
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@ -40,6 +40,6 @@ vtui $1000 {
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romsub $1023 = pet2scr(ubyte char @A) -> ubyte @A
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romsub $1023 = pet2scr(ubyte char @A) -> ubyte @A
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romsub $1026 = scr2pet(ubyte char @A) -> ubyte @A
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romsub $1026 = scr2pet(ubyte char @A) -> ubyte @A
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romsub $1029 = border(ubyte mode @A, ubyte width @R1, ubyte height @R2, ubyte colors @X) clobbers(Y) ; NOTE: mode 6 means 'custom' characters taken from r3 - r6
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romsub $1029 = border(ubyte mode @A, ubyte width @R1, ubyte height @R2, ubyte colors @X) clobbers(Y) ; NOTE: mode 6 means 'custom' characters taken from r3 - r6
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romsub $102c = save_rect(ubyte vbank @A, uword address @R0, ubyte width @R1, ubyte height @R2, ubyte ramtype @Pc) clobbers(A, X, Y)
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romsub $102c = save_rect(ubyte ramtype @Pc, ubyte vbank @A, uword address @R0, ubyte width @R1, ubyte height @R2) clobbers(A, X, Y)
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romsub $102f = rest_rect(ubyte vbank @A, uword address @R0, ubyte width @R1, ubyte height @R2, ubyte ramtype @Pc) clobbers(A, X, Y)
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romsub $102f = rest_rect(ubyte ramtype @Pc, ubyte vbank @A, uword address @R0, ubyte width @R1, ubyte height @R2) clobbers(A, X, Y)
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}
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}
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@ -5,8 +5,20 @@
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main {
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main {
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sub start() {
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sub start() {
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ubyte rr = bla(1,true,2)
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txt.print_ub(rr)
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txt.nl()
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rr = bla(1,false,2)
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txt.print_ub(rr)
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}
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uword zzz=memory("derp", 2000)
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asmsub bla(ubyte aa @A, ubyte cc @Pc, ubyte bb @Y) -> ubyte @A{
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txt.print("hello")
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%asm {{
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bcc +
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lda #10
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bne end
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+ lda #20
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end rts
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}}
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}
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}
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}
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}
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