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implement peekl() and pokel()

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Irmen de Jong
2025-10-07 00:53:00 +02:00
parent f4f34fc2ed
commit 0f564b301d
5 changed files with 72 additions and 132 deletions
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27
codeGenCpu6502/src/prog8/codegen/cpu6502/BuiltinFunctionsAsmGen.kt
View File

@@ -1027,9 +1027,10 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
}
private fun funcPokeL(fcall: PtBuiltinFunctionCall) {
val addrExpr = fcall.args[0]
val value = fcall.args[1]
TODO("pokel $addrExpr, $value")
// TODO optimize for the simple cases
asmgen.assignExpressionToRegister(fcall.args[1], RegisterOrPair.R0R1_32, true)
asmgen.assignExpressionToRegister(fcall.args[0], RegisterOrPair.AY)
asmgen.out(" jsr prog8_lib.func_pokel")
}
private fun funcPeekF(fcall: PtBuiltinFunctionCall, resultRegister: RegisterOrPair?) {
@@ -1129,9 +1130,11 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
}
private fun funcPeekL(fcall: PtBuiltinFunctionCall, resultRegister: RegisterOrPair?) {
val addrExpr = fcall.args[0]
val value = fcall.args[1]
TODO("peekl $addrExpr, $value")
// TODO optimize for the simple cases
asmgen.assignExpressionToRegister(fcall.args[0], RegisterOrPair.AY)
asmgen.out(" jsr prog8_lib.func_peekl")
val targetReg = AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.R0R1_32, true, fcall.position, fcall.definingISub(), asmgen)
assignAsmGen.assignRegisterLong(targetReg, RegisterOrPair.R0R1_32)
}
@@ -1419,6 +1422,9 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
else
asmgen.out(" lda $sourceName+1 | sta cx16.$regname | lda #0 | sta cx16.$regname+1")
}
in combinedLongRegisters -> {
TODO("msb into long register ${fcall.position}")
}
else -> throw AssemblyError("invalid reg")
}
} else {
@@ -1495,6 +1501,9 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
asmgen.assignExpressionToRegister(arg, RegisterOrPair.AY)
asmgen.out(" sty ${reg}L | lda #0 | sta ${reg}H | lda ${reg}L")
}
in combinedLongRegisters -> {
TODO("msb into long register ${fcall.position}")
}
else -> throw AssemblyError("invalid reg")
}
}
@@ -1523,6 +1532,9 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
else
asmgen.out(" lda $sourceName | sta cx16.$regname | lda #0 | sta cx16.$regname+1")
}
in combinedLongRegisters -> {
TODO("lsb into long register ${fcall.position}")
}
else -> throw AssemblyError("invalid reg")
}
} else {
@@ -1581,6 +1593,9 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
asmgen.assignExpressionToRegister(arg, RegisterOrPair.AY)
asmgen.out(" sta ${reg}L | ldy #0 | sty ${reg}H | cmp #0")
}
in combinedLongRegisters -> {
TODO("lsb into long register ${fcall.position}")
}
else -> throw AssemblyError("invalid reg")
}
}

6
codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/PointerAssignmentsGen.kt
View File

@@ -1669,6 +1669,9 @@ internal class PointerAssignmentsGen(private val asmgen: AsmGen6502Internal, pri
lda $regname+1
pha""")
}
in combinedLongRegisters -> {
TODO("save on stack long register pair")
}
else -> asmgen.saveRegisterStack(regs.asCpuRegister(), false)
}
}
@@ -1701,6 +1704,9 @@ internal class PointerAssignmentsGen(private val asmgen: AsmGen6502Internal, pri
pla
sta $regname""")
}
in combinedLongRegisters -> {
TODO("restore from stack long register")
}
else -> asmgen.restoreRegisterStack(regs.asCpuRegister(), false)
}
}