From 14e36f136258325eb90b3600e8fe6ff3e7820be7 Mon Sep 17 00:00:00 2001 From: Irmen de Jong Date: Wed, 11 May 2022 15:26:54 +0200 Subject: [PATCH] vm: fix assignment to array --- .../src/prog8/codegen/virtual/CodeGen.kt | 29 ++++++++++++------- docs/source/todo.rst | 1 - examples/test.p8 | 25 +++++++++++----- 3 files changed, 37 insertions(+), 18 deletions(-) diff --git a/codeGenVirtual/src/prog8/codegen/virtual/CodeGen.kt b/codeGenVirtual/src/prog8/codegen/virtual/CodeGen.kt index e83e6e97c..964b04fc4 100644 --- a/codeGenVirtual/src/prog8/codegen/virtual/CodeGen.kt +++ b/codeGenVirtual/src/prog8/codegen/virtual/CodeGen.kt @@ -646,25 +646,34 @@ class CodeGen(internal val program: PtProgram, var variableAddr = allocations.get(variable) val itemsize = program.memsizer.memorySize(array.type) val fixedIndex = constIntValue(array.index) - val vmDtArrayIdx = vmType(array.type) - // TODO floating point array incorrect? if(zero) { if(fixedIndex!=null) { variableAddr += fixedIndex*itemsize - code += VmCodeInstruction(Opcode.STOREZM, vmDtArrayIdx, value=variableAddr) + code += VmCodeInstruction(Opcode.STOREZM, VmDataType.FLOAT, value=variableAddr) } else { val indexReg = vmRegisters.nextFree() code += expressionEval.translateExpression(array.index, indexReg, -1) - code += VmCodeInstruction(Opcode.STOREZX, vmDtArrayIdx, reg1=indexReg, value=variableAddr) + code += VmCodeInstruction(Opcode.STOREZX, VmDataType.FLOAT, reg1=indexReg, value=variableAddr) } } else { - if(fixedIndex!=null) { - variableAddr += fixedIndex*itemsize - code += VmCodeInstruction(Opcode.STOREM, vmDtArrayIdx, reg1 = resultRegister, value=variableAddr) + if(vmDt==VmDataType.FLOAT) { + if(fixedIndex!=null) { + variableAddr += fixedIndex*itemsize + code += VmCodeInstruction(Opcode.STOREM, vmDt, fpReg1 = resultFpRegister, value=variableAddr) + } else { + val indexReg = vmRegisters.nextFree() + code += expressionEval.translateExpression(array.index, indexReg, -1) + code += VmCodeInstruction(Opcode.STOREX, vmDt, reg1 = resultRegister, reg2=indexReg, value=variableAddr) + } } else { - val indexReg = vmRegisters.nextFree() - code += expressionEval.translateExpression(array.index, indexReg, -1) - code += VmCodeInstruction(Opcode.STOREX, vmDtArrayIdx, reg1 = resultRegister, reg2=indexReg, value=variableAddr) + if(fixedIndex!=null) { + variableAddr += fixedIndex*itemsize + code += VmCodeInstruction(Opcode.STOREM, vmDt, reg1 = resultRegister, value=variableAddr) + } else { + val indexReg = vmRegisters.nextFree() + code += expressionEval.translateExpression(array.index, indexReg, -1) + code += VmCodeInstruction(Opcode.STOREX, vmDt, reg1 = resultRegister, reg2=indexReg, value=variableAddr) + } } } } diff --git a/docs/source/todo.rst b/docs/source/todo.rst index 7ef07ffff..b1e534ec6 100644 --- a/docs/source/todo.rst +++ b/docs/source/todo.rst @@ -3,7 +3,6 @@ TODO For next release ^^^^^^^^^^^^^^^^ -- vm: assignment to float array is not correct? also zero? - vm: use more instructions in codegen: shift one - vm: use more instructions in codegen: branching - vm: add more instructions operating directly on memory instead of only registers? diff --git a/examples/test.p8 b/examples/test.p8 index d464d4436..a1514d9f0 100644 --- a/examples/test.p8 +++ b/examples/test.p8 @@ -1,5 +1,6 @@ %import textio %import math +%import floats %zeropage dontuse @@ -20,15 +21,25 @@ main { ; return first * second ; } - sub ding(uword arg) { - arg++ - txt.print_uw(arg) - } - sub start() { - ding(0) + uword[] arrayuw = [1111,2222,3333,4444] + txt.print_uw(arrayuw[1]) txt.nl() - ding(2) + arrayuw[1] = 9999 + txt.print_uw(arrayuw[1]) + txt.nl() + arrayuw[1] = 0 + txt.print_uw(arrayuw[1]) + txt.nl() + + float[] array = [1.1, 2.2, 3.3, 4.4] + floats.print_f(array[1]) + txt.nl() + array[1] = 99.99 + floats.print_f(array[1]) + txt.nl() + array[1] = 0 + floats.print_f(array[1]) txt.nl() ; ubyte value = inline_candidate()