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fix direcetmemoryread invalid asm
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parent
22f8f4f359
commit
152888ee93
@ -1772,6 +1772,7 @@ _loop_hi ldy _index_first
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ror2_mem_ub .proc
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ror2_mem_ub .proc
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; -- in-place 8-bit ror of byte at memory location on stack
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; -- in-place 8-bit ror of byte at memory location on stack
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; TODO use self modifying code here
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inx
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inx
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lda c64.ESTACK_LO,x
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lda c64.ESTACK_LO,x
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sta c64.SCRATCH_ZPWORD1
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sta c64.SCRATCH_ZPWORD1
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@ -1788,7 +1789,7 @@ ror2_mem_ub .proc
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rol2_mem_ub .proc
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rol2_mem_ub .proc
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; -- in-place 8-bit rol of byte at memory location on stack
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; -- in-place 8-bit rol of byte at memory location on stack
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;" lda ${number.toHex()} | cmp #\$80 | rol a | sta ${number.toHex()}"
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; TODO use self modifying code here
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inx
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inx
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lda c64.ESTACK_LO,x
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lda c64.ESTACK_LO,x
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sta c64.SCRATCH_ZPWORD1
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sta c64.SCRATCH_ZPWORD1
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@ -40,6 +40,9 @@ fun compileProgram(filepath: Path,
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if (optimize)
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if (optimize)
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optimizeAst(programAst, errors)
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optimizeAst(programAst, errors)
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postprocessAst(programAst, errors, compilationOptions)
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postprocessAst(programAst, errors, compilationOptions)
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printAst(programAst) // TODO
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if(writeAssembly)
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if(writeAssembly)
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programName = writeAssembly(programAst, errors, outputDir, optimize, compilationOptions)
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programName = writeAssembly(programAst, errors, outputDir, optimize, compilationOptions)
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}
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}
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@ -127,8 +127,16 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
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asmgen.out(" lda ${address.toHex()} | sta $ESTACK_LO_HEX,x | dex")
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asmgen.out(" lda ${address.toHex()} | sta $ESTACK_LO_HEX,x | dex")
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}
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}
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is IdentifierReference -> {
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is IdentifierReference -> {
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// the identifier is a pointer variable, so read the value from the address in it
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val sourceName = asmgen.asmIdentifierName(expr.addressExpression as IdentifierReference)
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val sourceName = asmgen.asmIdentifierName(expr.addressExpression as IdentifierReference)
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asmgen.out(" lda $sourceName | sta $ESTACK_LO_HEX,x | dex")
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asmgen.out("""
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lda $sourceName
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sta (+) +1
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lda $sourceName+1
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sta (+) +2
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+ lda ${'$'}ffff ; modified
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sta $ESTACK_LO_HEX,x
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dex""")
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}
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}
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else -> {
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else -> {
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translateExpression(expr.addressExpression)
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translateExpression(expr.addressExpression)
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@ -66,20 +66,11 @@ internal class PostIncrDecrAsmGen(private val program: Program, private val asmg
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}
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}
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is IdentifierReference -> {
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is IdentifierReference -> {
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val what = asmgen.asmIdentifierName(addressExpr)
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val what = asmgen.asmIdentifierName(addressExpr)
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asmgen.out("""
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asmgen.out(" lda $what | sta (+) +1 | lda $what+1 | sta (+) +2")
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ldy $what
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sty ${C64Zeropage.SCRATCH_W1}
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ldy $what+1
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sty ${C64Zeropage.SCRATCH_W1 + 1}
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ldy #0
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lda (${C64Zeropage.SCRATCH_W1}),y
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""")
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if(incr)
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if(incr)
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asmgen.out(" clc | adc #1")
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asmgen.out("+\tinc ${'$'}ffff\t; modified")
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else
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else
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asmgen.out(" sec | sbc #1")
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asmgen.out("+\tdec ${'$'}ffff\t; modified")
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asmgen.out(" sta (${C64Zeropage.SCRATCH_W1}),y")
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}
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}
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else -> throw AssemblyError("weird target type $targetMemory")
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else -> throw AssemblyError("weird target type $targetMemory")
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}
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}
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