diff --git a/.idea/kotlinc.xml b/.idea/kotlinc.xml
index 54f2bd672..8fa75fe1c 100644
--- a/.idea/kotlinc.xml
+++ b/.idea/kotlinc.xml
@@ -4,6 +4,6 @@
-
+
\ No newline at end of file
diff --git a/codeCore/src/prog8/code/core/Enumerations.kt b/codeCore/src/prog8/code/core/Enumerations.kt
index fa6f2499a..9545b6118 100644
--- a/codeCore/src/prog8/code/core/Enumerations.kt
+++ b/codeCore/src/prog8/code/core/Enumerations.kt
@@ -159,6 +159,7 @@ val ElementToArrayTypes = mapOf(
DataType.FLOAT to DataType.ARRAY_F,
DataType.BOOL to DataType.ARRAY_BOOL
)
+
val Cx16VirtualRegisters = arrayOf(
RegisterOrPair.R0, RegisterOrPair.R1, RegisterOrPair.R2, RegisterOrPair.R3,
RegisterOrPair.R4, RegisterOrPair.R5, RegisterOrPair.R6, RegisterOrPair.R7,
@@ -166,6 +167,10 @@ val Cx16VirtualRegisters = arrayOf(
RegisterOrPair.R12, RegisterOrPair.R13, RegisterOrPair.R14, RegisterOrPair.R15
)
+val CpuRegisters = setOf(
+ RegisterOrPair.A, RegisterOrPair.X, RegisterOrPair.Y,
+ RegisterOrPair.AX, RegisterOrPair.AY, RegisterOrPair.XY
+)
enum class OutputType {
diff --git a/codeGenCpu6502/src/prog8/codegen/cpu6502/FunctionCallAsmGen.kt b/codeGenCpu6502/src/prog8/codegen/cpu6502/FunctionCallAsmGen.kt
index 86b9c7215..7b45dfa6b 100644
--- a/codeGenCpu6502/src/prog8/codegen/cpu6502/FunctionCallAsmGen.kt
+++ b/codeGenCpu6502/src/prog8/codegen/cpu6502/FunctionCallAsmGen.kt
@@ -89,7 +89,6 @@ internal class FunctionCallAsmGen(private val program: PtProgram, private val as
}
private fun argumentsViaRegisters(sub: PtAsmSub, call: PtFunctionCall) {
- val cpuRegisters = setOf(RegisterOrPair.A, RegisterOrPair.X, RegisterOrPair.Y, RegisterOrPair.AX, RegisterOrPair.AY, RegisterOrPair.XY)
val registersUsed = mutableListOf();
fun usedA() = registersUsed.any {it.registerOrPair==RegisterOrPair.A || it.registerOrPair==RegisterOrPair.AX || it.registerOrPair==RegisterOrPair.AY}
@@ -104,7 +103,7 @@ internal class FunctionCallAsmGen(private val program: PtProgram, private val as
val param = sub.parameters[it]
val arg = call.args[it]
registersUsed += if(usesOtherRegistersWhileEvaluating(arg)) {
- if(!registersUsed.any{it.statusflag!=null || it.registerOrPair in cpuRegisters})
+ if(!registersUsed.any{it.statusflag!=null || it.registerOrPair in CpuRegisters})
argumentViaRegister(sub, IndexedValue(it, param.second), arg)
else if(registersUsed.any {it.statusflag!=null}) {
throw AssemblyError("call argument evaluation problem: can't save cpu statusregister parameter ${call.position}")
diff --git a/compiler/res/prog8lib/cx16/gfx2.p8 b/compiler/res/prog8lib/cx16/gfx2.p8
index 69b77e5be..99727590a 100644
--- a/compiler/res/prog8lib/cx16/gfx2.p8
+++ b/compiler/res/prog8lib/cx16/gfx2.p8
@@ -14,10 +14,10 @@
; SCREEN MODE LIST:
; mode 0 = reset back to default text mode
; mode 1 = bitmap 320 x 240 x 256c (8 bpp)
-; mode 2 = bitmap 640 x 480 x 4c (2 bpp. there's not enough vram for more colors in hires mode.)
-; mode 3 = bitmap 320 x 240 x 16c (not yet implemented: just use 256c, there's enough vram for that)
-; mode 4 = bitmap 320 x 240 x 4c (not yet implemented: just use 256c, there's enough vram for that)
-; higher color depths in highres are not supported due to lack of VRAM
+; mode 2 = bitmap 640 x 480 x 4c (2 bpp)
+; mode 3 = bitmap 320 x 240 x 4c (not yet implemented: just use 256c, there's enough vram for that)
+; mode 4 = bitmap 320 x 240 x 16c (not yet implemented: just use 256c, there's enough vram for that)
+; mode 5 = bitmap 640 x 400 x 16c (not yet implemented)
gfx2 {
diff --git a/docs/source/todo.rst b/docs/source/todo.rst
index a5d480918..1ca76afa6 100644
--- a/docs/source/todo.rst
+++ b/docs/source/todo.rst
@@ -1,6 +1,10 @@
TODO
====
+- fix the parameter passing bug intruduced recently. Example: cx16.FB_cursor_position(math.rnd(), math.rnd())
+
+- add a %zpallowed option to specify the range of zeropage register that can be used (intersect with the actual available zp registers ofcourse)
+
- [on branch: shortcircuit] investigate McCarthy evaluation again? this may also reduce code size perhaps for things like if a>4 or a<2 ....
- [on branch: ir-less-branch-opcodes] IR: reduce the number of branch instructions such as BEQ, BEQR, etc (gradually), replace with CMP(I) + status branch instruction
- IR: reduce amount of CMP/CMPI after instructions that set the status bits correctly (LOADs? INC? Bitwise operations, etc), but only after setting the status bits is verified!
diff --git a/examples/test.p8 b/examples/test.p8
index 39318bd5d..3ddb11afc 100644
--- a/examples/test.p8
+++ b/examples/test.p8
@@ -1,28 +1,16 @@
-%import textio
+%import syslib
+%import gfx2
%import math
-%option no_sysinit
-%zeropage basicsafe
main {
sub start() {
- uword[] array = [$1010,$2020,$3030,$4040,$5050]
- ubyte index = 2
- uword value = $0205
+ void cx16.screen_mode(128, false)
- array[index] ^= $0205
- txt.print_uwhex(array[2], true)
- txt.nl()
-
- array[index]+=9
-
- txt.print_uwhex(array[2], true)
- txt.nl()
-
- array[index] = $3030
- array[index] |= value
- txt.print_uwhex(array[2], true)
- txt.nl()
-
- ; TODO met var array[index]|=index
+ ubyte color
+ repeat {
+ cx16.FB_cursor_position(math.rnd(), math.rnd())
+ cx16.FB_set_pixel(color)
+ color++
+ }
}
}
diff --git a/gradle.properties b/gradle.properties
index 3afd4299c..a3f713e95 100644
--- a/gradle.properties
+++ b/gradle.properties
@@ -4,5 +4,5 @@ org.gradle.parallel=true
org.gradle.daemon=true
kotlin.code.style=official
javaVersion=11
-kotlinVersion=1.9.10
+kotlinVersion=1.9.20
version=9.6-SNAPSHOT