From 1e1f444cabda6d8d288437990a6143c2c69872d3 Mon Sep 17 00:00:00 2001 From: Irmen de Jong Date: Sat, 30 Dec 2023 04:34:07 +0100 Subject: [PATCH] cleanups. also checked that value(12) < x < value(100) is indeed properly shortcircuited if x is 12 or less --- .../cpu6502/assignment/AssignmentAsmGen.kt | 2 -- .../assignment/AugmentableAssignmentAsmGen.kt | 2 -- examples/test.p8 | 18 +++++++++++++++++- 3 files changed, 17 insertions(+), 5 deletions(-) diff --git a/codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt b/codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt index 6f3f37a95..edfe856e5 100644 --- a/codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt +++ b/codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt @@ -1056,7 +1056,6 @@ internal class AssignmentAsmGen(private val program: PtProgram, when (expr.operator) { "and" -> { // short-circuit LEFT and RIGHT --> if LEFT then RIGHT else LEFT (== if !LEFT then LEFT else RIGHT) - println("SHORTCUT AND ${expr.position}") // TODO weg assignExpressionToRegister(expr.left, RegisterOrPair.A, false) asmgen.out(" beq $shortcutLabel") assignExpressionToRegister(expr.right, RegisterOrPair.A, false) @@ -1064,7 +1063,6 @@ internal class AssignmentAsmGen(private val program: PtProgram, } "or" -> { // short-circuit LEFT or RIGHT --> if LEFT then LEFT else RIGHT - println("SHORTCUT OR ${expr.position}") // TODO weg assignExpressionToRegister(expr.left, RegisterOrPair.A, false) asmgen.out(" bne $shortcutLabel") assignExpressionToRegister(expr.right, RegisterOrPair.A, false) diff --git a/codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AugmentableAssignmentAsmGen.kt b/codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AugmentableAssignmentAsmGen.kt index 5cbc0825b..5700a7caa 100644 --- a/codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AugmentableAssignmentAsmGen.kt +++ b/codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AugmentableAssignmentAsmGen.kt @@ -798,7 +798,6 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram, when (operator) { "and" -> { // short-circuit LEFT and RIGHT --> if LEFT then RIGHT else LEFT (== if !LEFT then LEFT else RIGHT) - println("SHORTCUT AND ${value.position}") // TODO weg asmgen.out(" lda $name | beq $shortcutLabel") asmgen.assignExpressionToRegister(value, RegisterOrPair.A, dt in SignedDatatypes) asmgen.out(""" @@ -809,7 +808,6 @@ $shortcutLabel:""") } "or" -> { // short-circuit LEFT or RIGHT --> if LEFT then LEFT else RIGHT - println("SHORTCUT OR ${value.position}") // TODO weg asmgen.out(" lda $name | bne $shortcutLabel") asmgen.assignExpressionToRegister(value, RegisterOrPair.A, dt in SignedDatatypes) asmgen.out(""" diff --git a/examples/test.p8 b/examples/test.p8 index ba1fe9d1b..213cf02d1 100644 --- a/examples/test.p8 +++ b/examples/test.p8 @@ -2,13 +2,29 @@ %zeropage dontuse main { + sub start() { + ubyte @shared x = 10 + if value(12) < x < value(100) + txt.print("gottem") + + sub value(ubyte v) -> ubyte { + cx16.r0++ + txt.print("value(): ") + txt.print_ub(v) + txt.nl() + return v + } + + bigtest() + } + ubyte @shared a1 = 10 ubyte @shared a2 = 20 ubyte @shared x1 = 30 ubyte @shared x2 = 40 ubyte @shared zero = 0 - sub start () { + sub bigtest () { txt.print("1a:\n") if calc_a1()