fix return type error for asmsubs with >1 result values

This commit is contained in:
Irmen de Jong 2022-04-01 22:30:15 +02:00
parent 156cf7315c
commit 20d06d9f9d
2 changed files with 44 additions and 24 deletions

View File

@ -985,9 +985,21 @@ class FunctionCallExpression(override var target: IdentifierReference,
return InferredTypes.knownFor(stmt.returntypes[0]) return InferredTypes.knownFor(stmt.returntypes[0])
// multiple return values. Can occur for asmsub routines. If there is exactly one register return value, take that. // multiple return values. Can occur for asmsub routines. If there is exactly one register return value, take that.
val numRegisterReturns = stmt.asmReturnvaluesRegisters.count { it.registerOrPair!=null } val registerReturns = stmt.asmReturnvaluesRegisters.filter {it.registerOrPair != null }
if(numRegisterReturns==1) if(registerReturns.size==1) {
return InferredTypes.InferredType.known(DataType.UBYTE) val reg = registerReturns.single().registerOrPair!!
return when(reg) {
RegisterOrPair.A,
RegisterOrPair.X,
RegisterOrPair.Y -> InferredTypes.InferredType.known(DataType.UBYTE)
RegisterOrPair.AX,
RegisterOrPair.AY,
RegisterOrPair.XY, in Cx16VirtualRegisters -> InferredTypes.InferredType.known(DataType.UWORD)
RegisterOrPair.FAC1,
RegisterOrPair.FAC2 -> InferredTypes.InferredType.known(DataType.FLOAT)
else -> throw FatalAstException("weird reg")
}
}
return InferredTypes.unknown() // has multiple return types... so not a single resulting datatype possible return InferredTypes.unknown() // has multiple return types... so not a single resulting datatype possible
} }

View File

@ -7,27 +7,35 @@ main {
sub start() { sub start() {
txt.print("keyboard api test\n")
cx16.kbdbuf_put('l')
cx16.kbdbuf_put('o')
cx16.kbdbuf_put('a')
cx16.kbdbuf_put('d')
cx16.kbdbuf_put(13)
; the "pixelshader": ; the "pixelshader":
syscall1(8, 0) ; enable lo res creen ; syscall1(8, 0) ; enable lo res creen
ubyte shifter ; ubyte shifter
;
shifter >>= 1 ; shifter >>= 1
;
repeat { ; repeat {
uword xx ; uword xx
uword yy = 0 ; uword yy = 0
repeat 240 { ; repeat 240 {
xx = 0 ; xx = 0
repeat 320 { ; repeat 320 {
syscall3(10, xx, yy, xx*yy + shifter) ; plot pixel ; syscall3(10, xx, yy, xx*yy + shifter) ; plot pixel
xx++ ; xx++
} ; }
yy++ ; yy++
} ; }
shifter+=4 ; shifter+=4
;
txt.print_ub(shifter) ; txt.print_ub(shifter)
txt.nl() ; txt.nl()
} ; }
} }
} }